- implement 'fastboot flash' for eMMC devices
Signed-off-by: NSteve Rae <srae@broadcom.com>
Acked-by: NLukasz Majewski <l.majewski@samsung.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

- add support for 'fastboot flash' command for eMMC devices
Signed-off-by: NSteve Rae <srae@broadcom.com>

Enable the Extend address to support SPI flash more than 16MB.
Signed-off-by: NHou Zhiqiang <B48286@freescale.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: NPrafulla Wadaskar <prafulla@marvell.com>
Tested-by: NLuka Perkov <luka@openwrt.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NPrafulla Wadaskar <prafulla@marvell.com>
Tested-by: NLuka Perkov <luka@openwrt.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:

-	 writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+	 writel(KWSPI_SMEMRDY, &spireg->ctrl);

Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffffffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.

Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).

This is in preparation for use of this driver on the Marvell Armada XP
platform as well.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NPrafulla Wadaskar <prafulla@marvell.com>
Tested-by: NLuka Perkov <luka@openwrt.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Tested-by: NLuka Perkov <luka@openwrt.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Add ID for this Numonix / STMicro chip.

Tested on Marvell DB-78460-BP board.
Signed-off-by: NStefan Roese <sr@denx.de>
Tested-by: NLuka Perkov <luka@openwrt.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in
SPL. These #defines do not allow the user to select SPI mode for the SPI flash
(there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in
spi_spl_load.c), and duplicate information already provided by
CONFIG_SF_DEFAULT_* #defines.

Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead.

Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Hannes Petermaier <hannes.petermaier@br-automation.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:

cs = (cs | gpio << 8)

This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".

This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.

Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.

Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Add support for M25PE16 and M25PX16

Cc: Marek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Since dev->req_seq value is initialized from "reg" property of fdt node,
there is posibility, that address value contained in fdt is greater than
INT_MAX, and then value in dev->req_seq is negative which led to probe()
fail.

This patch fix this problem by ensuring that req_seq is positive, unless
it's one of errno codes.
Signed-off-by: NRobert Baldyga <r.baldyga@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Allow serial_find_console_or_panic() to work without a device tree.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The sequence number support in driver model requires device tree control.
It should be skipped if CONFIG_OF_CONTROL is not defined, and should not
require functions from fdtdec.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).
Signed-off-by: NSimon Glass <sjg@chromium.org>

A merge error ended up repeating a similar sentence twice. Fix it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The get_maintainers script is a useful default, but sometimes is copies
too many people, or takes a long time to run.

Add an option to disable it and update the README.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This check should now be done whatever mode buildman is running in, since
we may be displaying information while building.
Signed-off-by: NSimon Glass <sjg@chromium.org>

- Use _defconfig instead of _config, but still _config is working.
- Corrected README.sandbox path in ./README
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Disable subpage write when using PMECC to prevent buggy partial page write.

This fix has been taken from linux sources (see commit
90445ff6241e2a13445310803e2efa606c61f276)
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Using CPU_HAS_PCR micro to present the SoC has pcr
(peripheral control register).
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

When use pcr (peripheral control register), then we won't need
to care about the peripheral ID.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Add NOR flash hardware init function, including SMC and PIO
configuration.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access.
But in the driver we also use the readl(b)/writel.
To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

This patch adds boot script support to am335x_evm
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>

OMAP4: Use generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage'.

This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage' for OMAP4 boards.

This allows to use EXT partition instead of FAT, while keeping FAT compatibility.
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>

This patch implements a workaround to fix DDR3 memory issue.
The code for workaround detects PGSR0 errors and then preps for
and executes a software-controlled hard reset.In board_early_init,
where logic has been added to identify whether or not the previous
reset was a PORz. PLL initialization is skipped in the case of a
software-controlled hard reset.
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NKeegan Garcia <kgarcia@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>

Commit f219e013 (tools: Import Kconfiglib)
added SPDX GPL-2.0+ to this library by mistake.
It should be ISC.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Ulf Magnusson <ulfalizer@gmail.com>

At the high level, the problem is that we set gd multiple times (and
still do, even after the commit we're reverting).  We set important
parts of gd to the copy which is not above stack but rather in the data
section.  For the release, we're going to revert this change and for the
next release we shall correct things to only, really, set gd once to an
appropriate location and ensure that comments about it are correct too.

This reverts commit f0c3a6c4.
Acked-by: NAlbert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: NTom Rini <trini@ti.com>