- 08 10月, 2020 40 次提交
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由 Andre Przywara 提交于
The CONFIG_TFABOOT option is more about what U-Boot DOES NOT need to do than to support some features. Explain a bit more in the Kconfig help text to avoid misunderstandings. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Heinrich Schuchardt 提交于
Most users don't need the standalone API examples. Distributions like SUSE do not supply libgcc for cross-compiling and we cannot do without on ARMv8 for building examples/. Make examples selectable via symbol CONFIG_EXAMPLES. It defaults to yes on ARCH_QEMU to ensure that we compile the API as part of our continuous integration. Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NMatthias Brugger <mbrugger@suse.com>
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由 Jack Mitchell 提交于
The timeout calculation is based on the clk being in KHz but the clk api returns the clk value in Hz. Convert this to KHz to calculate the correct timeout value. Signed-off-by: NJack Mitchell <ml@embed.me.uk>
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由 Sean Anderson 提交于
This patch adds the necessary configs and docs for FPIOA and GPIO support on the K210. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Heinrich Schuchardt 提交于
Add a device tree binding for the BOOT button on the Maix board. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NSean Anderson <seanga2@gmail.com> Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NRick Chen <rick@andestech.com>
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由 Sean Anderson 提交于
This patch adds the necessary device tree bindings. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NRick Chen <rick@andestech.com>
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由 Sean Anderson 提交于
This modifies the existing led test to check for default led naming as added in the previous patch. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
This more closely mirrors Linux's behaviour, and will make it easier to transition to using function+color in the future. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
dm_gpio_ops.get_value can be called when the gpio is either input or output. The current dw code always returns the input value, which is invalid if the direction is set to out. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NLey Foon Tan <ley.foon.tan@intel.com>
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由 Sean Anderson 提交于
Previously, if there was no bank-name property, it was easy to have confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch follows the example of the sifive gpio driver. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void pointer, since we pass it to readl. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NLey Foon Tan <ley.foon.tan@intel.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
This normalizes the documentation to conform to kernel-doc style [1]. It also moves the documentation for pinctrl_ops inline, and adds argument and return-value documentation. I have kept the usual function style for these comments. I could not find any existing examples of function documentation inside structs. [1] https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.htmlSigned-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sean Anderson 提交于
The pinmux property allows for smaller and more compact device trees, especially when there are many pins which need to be assigned individually. Instead of specifying an array of strings to be parsed as pins and a function property, the pinmux property contains an array of integers representing pinmux groups. A pinmux group consists of the pin identifier and mux settings represented as a single integer or an array of integers. Each individual pin controller driver specifies the exact format of a pinmux group. As specified in the Linux documentation, a pinmux group may be multiple integers long. However, no existing drivers use multi-integer pinmux groups, so I have chosen to omit this feature. This makes the implementation easier, since there is no need to allocate a buffer to do endian conversions. Support for the pinmux property is done differently than in Linux. As far as I can tell, inversion of control is used when implementing support for the pins and groups properties to avoid allocating. This results in some duplication of effort; every property in a config node is parsed once for each pin in that node. This is not such an overhead with pins and groups properties, since having multiple pins in one config node does not occur especially often. However, the semantics of the pinmux property make such a configuration much more appealing. A future patch could parse all config properties at once and store them in an array. This would make it easier to create drivers which do not function solely as callbacks from pinctrl-generic. This commit increases the size of the sandbox build by approximately 48 bytes. However, it also decreases the size of the K210 device tree by 2 KiB from the previous version of this series. The documentation has been updated from the last Linux commit before it was split off into yaml files. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Dylan Hung 提交于
the aspeed ddr sdram controller needs to know if the memory chip mounted on the board is dual x8 die or not. Or it may get the wrong size of the memory space. Signed-off-by: NDylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Dylan Hung 提交于
to improve the maintainability. It is more easier to modify and add configurations of the driver in the centralized ram driver directory. Signed-off-by: NDylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-cfi-flash由 Tom Rini 提交于
- Fix devicetree address determination seen on QEMU ARM64 - Use DMA for reads is available
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由 Andre Przywara 提交于
The cfi-flash driver uses an open-coded version of the generic algorithm to decode and translate multiple frames of a "reg" property. This starts off the wrong foot by using the address-cells and size-cells properties of *this* very node, and not of the parent. This somewhat happened to work back when we were using a wrong default size of 2, but broke about a year ago with commit 0ba41ce1 ("libfdt: return correct value if #size-cells property is not present"). Instead of fixing the reinvented wheel, just use the generic function that does all of this properly. This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding a wrong flash base address: DRAM: 1 GiB Flash: "Synchronous Abort" handler, esr 0x96000044 elr: 00000000000211dc lr : 00000000000211b0 (reloc) elr: 000000007ff5e1dc lr : 000000007ff5e1b0 x0 : 00000000000000f0 x1 : 000000007ff5e1d8 x2 : 000000007edfbc48 x3 : 0000000000000000 x4 : 0000000000000000 x5 : 00000000000000f0 x6 : 000000007edfbc2c x7 : 0000000000000000 x8 : 000000007ffd8d70 x9 : 000000000000000c x10: 0400000000000003 x11: 0000000000000055 ^^^^^^^^^^^^^^^^ Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Vignesh Raghavendra 提交于
When possible use DMA for reading from CFI flash, this provides upto 5x improvement in read performance with high speed CFI compliant flashes like HyperFlash. Code will gracefully fallback to CPU copy when DMA is unavailable. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Vignesh Raghavendra 提交于
Caller would need gracefully handle failures of dma_get_device(), therefore reduce pr_err() to pr_debug() when DMA device is not found. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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https://gitlab.denx.de/u-boot/custodians/u-boot-mips由 Tom Rini 提交于
- mips: octeon: add support for DDR4 memory controller - mips: octeon: add support for DWC3 USB - mips: octeon: add support for booting Linux
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由 Stefan Roese 提交于
Increase CONFIG_SYS_BOOTM_LEN to 64MiB for Linux kernel booting. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
Octeon needs a platform specific cmd to boot the Linux kernel, as specific parameters need to be passed and special handling for the multiple cores (SMP) is needed. Co-developed-by: NStefan Roese <sr@denx.de> Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de> [use gd->ram_base instead of gd->bd->bi_memstart] Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Aaron Williams 提交于
This is needed for Linux booting, as the memory infos need to be passed in this bootmem format to the Linux kernel. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
This patch adds the coremask handling functions. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
Add header to handle bootinfo support, needed for Octeon Linux kernel booting. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
Add header to handle Octeon fuse access. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
This header includes the Octeon feature detection used in many Octeon drivers. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Aaron Williams 提交于
This header includes common register defines and accessor functions. Signed-off-by: NAaron Williams <awilliams@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch adds the necessary lowlevel init code, to enable SMP Linux booting. This code will be used with the platform specific Octeon Linux boot command "bootoctlinux", which starts a configurable number of cores into Linux. Additionally some erratas and lowlevel register initializations are copied from the original Cavium / Marvell U-Boot source code, enabling booting into the Linux kernel. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Add the #ifdef __ASSEMBLY__ checks to enable inclusion of this header from assembler files. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch enables USB support with some helpful commands, like fs support. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Add the USB device tree nodes to the Octeon dts/dtsi files. Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
As noticed while working on the USB xHCI support, Octeon needs to flush all pending writes so that the values are present in the memory. Add this "syncw" instruction (twice) to flush_dcache_range(). Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Import platform specific mangle-port.h header, allowing a area specific swapping, which is needed on Octeon for USB & PCI areas. Imported from Linux v5.7. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Import octeon_should_swizzle_table[] which is needed for the area specific swapping. It will be used by the platform specific mangle-port.h header. Imported from Linux v5.7. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch adds the glue layer for the MIPS Octeon SoCs. It's ported mainly from the Linux code. Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de>
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由 Stefan Roese 提交于
Octeon uses mapped addresses for virtual and physical memory. It's not that easy to calculate the resulting addresses here. So let's remove this BUG_ON() completely, as it's not really helpful. Please also note, that BUG_ON() is not recommended any more in the Linux kernel. Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de>
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由 Stefan Roese 提交于
On MIPS platforms, mapping of the base address is needed. This patch switches from dev_get_addr() to dev_remap_addr() to get the mapped base address of the xHCI controller. Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de>
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