- 08 5月, 2017 37 次提交
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由 Chris Packham 提交于
After moving to KConfig and removing from all headers options should be removed from config_whitelist.txt so the build starts complaining if someone adds them back. Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Chris Packham 提交于
Avoid repetitive code dealing with asking the user for confirmation. Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Chris Packham 提交于
Add an implementation of the ds1307 driver that uses the driver model i2c APIs. Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Pau Pajuelo 提交于
netboot allows to boot an external image using TFTP and NFS protocols Signed-off-by: NPau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Pau Pajuelo 提交于
The IGEP SMARC AM335x is an industrial processor module with following highlights: o AM3352 TI processor (Up to AM3359) o Cortex-A8 ARM CPU o SMARC form factor module o Up to 512 MB DDR3 SDRAM / 512 MB FLASH o WiFi a/b/g/n and Bluetooth v4.0 on-board o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: NPau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Ladislav Michl 提交于
Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher<hs@denx.de> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Ladislav Michl 提交于
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034) can use the same source files. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Ladislav Michl 提交于
nand_spl_load_image implementation was copied over into three different drivers and now with nand_spl_read_block used for ubispl situation gets even worse. For now use least intrusive solution and #include the same implementation to nand drivers. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Ladislav Michl 提交于
am33xx does not support OneNAND, but we need this define anyway to let UBI SPL code compile. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Ladislav Michl 提交于
Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Tested-by: NPau Pajuelo <ppajuel@gmail.com>
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由 Vikas Manocha 提交于
This patch removes: - CONFIG_CMD_MEM: enabled by default - CONFIG_DESIGNWARE_ETH : not being used anywhere. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
This board support stm32f7 family device stm32f769-I with 2MB internal Flash & 512KB RAM. STM32F769 lines offer the performance of the Cortex-M7 core (with double precision floating point unit) running up to 216 MHz. To compile for stm32f769 board, use same defconfig as stm32f746-disco, the only difference is to pass "DEVICE_TREE=stm32f769-disco". Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
The number of pins to be configured could be more than 50 e.g. in case of sdram controller, there are about 56 pins (32 data lines, 12 address & some control signals). Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Actually the sdram memory on stm32f746 discovery board is micron part MT48LC_4M32_B2B5_6A. This patch does the modification required in the device tree node & driver for the same. Also we are passing here all the timing parameters in terms of clock cycles, so no need to convert time(ns or ms) to cycles. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
All discovery boards have one user button & one user LED. Here we are just reading the button status & switching ON the user LED. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Vikas Manocha 提交于
Also created alias for gpios for stm32f7 discovery board. Based on these aliases, it would be possible to get gpio devices by sequence. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
This patch adds gpio driver supporting driver model for stm32f7 gpio. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
As driver model takes care of pin control configuraion, this patch also removes the sdram/fmc pin configuration. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Also added DT binding doc for stm32 fmc(flexible memory controller). Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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由 Vikas Manocha 提交于
At present fdt blob or argument address being passed to kernel is fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from different media like nand, nor flash are copied to the address pointed by the macro. The problem is, it makes args/fdt blob compulsory to copy which is not required in cases like for NOR Flash. This patch removes this limitation. Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
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由 Uri Mashiach 提交于
Add CONFIG_CMD_USB to the defconfig file. Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Uri Mashiach 提交于
Add CONFIG_USB_STORAGE to the defconfig file. Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Uri Mashiach 提交于
USB bus scan attempt: ----------------------------------cut---------------------------------- => usb start starting USB... USB0: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... data abort pc : [<fff6240e>] lr : [<fff623b3>] reloc pc : [<8081b40e>] lr : [<8081b3b3>] sp : fdf42930 ip : fdf42960 fp : 00000000 r10: 00000001 r9 : fdf42ef0 r8 : 48890020 r7 : 00000002 r6 : fffa5840 r5 : fff8b140 r4 : fdf429c0 r3 : 00000000 r2 : 00000004 r1 : 00000000 r0 : 00000000 Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... ----------------------------------cut---------------------------------- Fix by enabling USB configuration in the SPL. Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Uri Mashiach 提交于
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Modifications: * Enable USB clocks in the OMAP version of the function board_usb_init. * Disable USB clocks in the OMAP version of the function board_usb_cleanup. Cc: Marek Vasut <marex@denx.de> Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Uri Mashiach 提交于
A weak version of the function board_usb_init is implemented in: common/usb.c drivers/usb/host/xhci-omap.c To fix the double implementations: * Convert the board_usb_init function in drivers/usb/host/xhci-omap.c normal (not weak). * The function board_usb_init in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_init. * Rename board version of the function board_usb_init to omap_xhci_board_usb_init. Done only for boards that defines CONFIG_USB_XHCI_OMAP. To achieve the same flexibility with the function board_usb_cleanup: * Add a normal (not weak) implementation of the function board_usb_cleanup in drivers/usb/host/xhci-omap.c * The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_cleanup. * Rename board version of the function board_usb_cleanup to omap_xhci_board_usb_cleanup. Done only for boards that defines CONFIG_USB_XHCI_OMAP. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Acked-by: NMarek Vasut <marex@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NRoger Quadros <rogerq@ti.com>
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由 Uri Mashiach 提交于
Modify the determination of the base address of xHCI registers of DRA7XX targets. Before the commit: by the target. After the commit: by the USB port index. Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NRoger Quadros <rogerq@ti.com> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NMarek Vasut <marex@denx.de>
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由 Uri Mashiach 提交于
The symbol CONFIG_DRA7XX is needed for Kconfig conditions. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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- 06 5月, 2017 3 次提交
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由 xypron.glpk@gmx.de 提交于
The logical expression to check the dtb is incorrect in load_devicetree. The problem was indicated by cppcheck. The inconsistent variable name dtppart is changed to dtbpart. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NHannes Schmelzer <oe5hpm@oevsv.at> Acked-by: NHannes Schmelzer <oe5hpm@oevsv.at>
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由 xypron.glpk@gmx.de 提交于
The evaluation of option -c is incorrect: According to the C99 standard endptr in the first strtol is always set as &endptr is not NULL. So the first part of the or condition is always true. If all digits in optarg are valid endptr will point to the closing \0 and the second strtol will read beyond the end of the string optarg points to. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 xypron.glpk@gmx.de 提交于
va_start must always be matched by va_end. The problem was indicated by cppcheck. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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