dra76-evm has the ddr parts connectedi running at 666MHz:
EMIF1: MT41K512M16HA-125 AIT:A  x 2
EMIF2: MT41K512M8RH-125-AAT:E x 4
Add support for configuring the above DDR parts.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

dra76-evm uses lp8736 and tps65917 pmic for powering on
various peripherals. Add data for these pmics and register
for dra76-evm.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

The dra76-evm is a board based on TI's DRA76 processor
Add eeprom support
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max speed of 1.8GHz
- 2 X DSP
- 2 X Cortex-M4 IPU
- ISS
- CAL
- DSS
- VPE
- VIP
Connectivity peripherals:
- 1 USB3.0 and 3 USB2.0 subsystems
- 1 x SATA
- 2 x PCI Express Gen2
- 3-port Gigabit ethernet switch
- 2 x CAN
- MCAN

Adding CPU detection support for the dra76 ES1.0 soc
and update prcm, control module, dplls data.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NPraneeth Bajjuri <praneeth@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

LP87565 is present on dra76-evm. Select it for
TARGET_DRA7XX_EVM.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

It is not necessary that ldo1 is used to power on mmc.
So, add support for passing ldo registers for powering on mmc.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

It is not necessary all omap5+ based uses the same PMIC
to poweron mmc. So add support for enabling mmc based on board.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

Replacing original author Mateusz Kulikowski
<mateusz.kulikowski@gmail.com> as db410c maintainer
Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz.

When running a SPL target, which supports multiple MX6 variants we cannot
properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as
such decision is done in build-time currently.

Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be
configured in run-time on mx6.
Reported-by: NEric Nelson <eric@nelint.com>
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NEric Nelson <eric@nelint.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
[agust: fixed #endif in cgtqmx6eval.h]
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

At present the IDE device number is initialized to -1, which means
we cannot type "ide read" command before setting the device number
via "ide device #".

For convenience, let's set the first device as the default one.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

When there is no CDROM inserted, the block size is zero hence there
is no need to create a BLK device for it.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This converts the IDE driver to driver model so that block read and
write are fully functional.

Fixes: b7c6baef ("x86: Convert MMC to driver model")
Reported-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

So far these are using magic numbers. Replace them with macros.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This board does dwc3 gadget, not host, so we cannot have host support or
we will fail to link.
Signed-off-by: NTom Rini <trini@konsulko.com>

The underlying implementation for ENV_AES has security complications and
is not recommended for use.  Please see CVE-2017-3225 and CVE-2017-3226
for more details.  Mark this as deprecated now and delete this in the
medium term if no one comes forward to re-work the support.
Signed-off-by: NTom Rini <trini@konsulko.com>

A number of the config options for USB networking have been migrated to
Kconfig. Update README.usb to reflect this.
Signed-off-by: NChris Packham <judge.packham@gmail.com>

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This is not a valid option. Drop it.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This is not a valid option. Drop it.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The correct name is 'gd->fdt_blob', not 'gd->blob'.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

With Makefiles testing for $(SPL_TPL_)SYSRESET, we need SPL_SYSRESET
for do_reset() in SPL for Rockchip SoCs.

References: 87c16d49 "drivers: spl: consistently use the $(SPL_TPL_) macro"
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

syscon id table need a dummy member as NULL ending, or else system
will panic while try to match a compatible in this table as a list.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Disable CONFIG_ARCH_FIXUP_FDT_MEMORY to prevent U-Boot from modifying
the memory {} nodes in the DT passed to the Linux kernel. The R8A779x
DT contains multiple memory {} nodes, while U-Boot only modifies the
first one and stuffs all the memory entries into it, which is wrong.
Disabling CONFIG_ARCH_FIXUP_FDT_MEMORY is the least intrusive way to
fix the issue this close to the release, while the real fix is to
extend the fdt_fixup_memory_banks() to handle multiple memory nodes
in DT.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

On RCar M3 and on RCar H3 newer than and not including ES1.0, the SD clock
must be divided by 4 rather than 2 because a hardware workaround present
only in the H3 ES1.0 has been removed from these chips. U-Boot currently
only supports M3 and H3 ES 2.0 and newer, so configure the SD pre-divider
to 4 to prevent SD instability.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

%s/Desriptor/Descriptor/g
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Acked-by: NYork Sun <york.sun@nxp.com>

In the general case, CONFIG_NFS_READ_SIZE is unchanged from the default
of 1024.  There are in fact no in-tree users that increase this size.
Adjust the comment to reflect what could be done in the future in
conjunction with CONFIG_IP_DEFRAG.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

The old logic always enabled the TX-delay when the phy-mode was set to
PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for
PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and
disable it for PHY_INTERFACE_MODE_RGMII.

Based on a similar change made in the Linux Realtek PHY driver
by Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Acked-by: NYork Sun <york.sun@nxp.com>

Delete one redundant 'which' for SPL_ATF_SUPPORT description.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Remove a comment line refering to a non-existent file.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

The inline documentation of vsprintf mentions a parameter size
which does not exist in the function declaration.

int vsprintf(char *buf, const char *fmt, va_list args);
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

This reverts commit 25877d4e.

This is a workaround for Raspberry Pi boot failures seen when passing on
the device tree provided by the Raspberry Pi firmware at boot. Without
CONFIG_OF_EMBED, we just get stuck at "Starting kernel ..." when we try
to boot Linux with this device tree.
Signed-off-by: NPaul Barker <pbarker@toganlabs.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: NJonathan Gray <jsg@jsg.id.au>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Some files are generated during libfdt build. Ignore them.

This was wrongly put in the .gitignore in the root directory before.
Now let's remove entries there and put them in the right place.

Fixes: 34e2c285 ("gitignore: add intermediates from libfdt build")
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

These are currently out of alphabetical order.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

Signed-off-by: NAlison Chaiken <alison@she-devel.com>