- 08 10月, 2019 2 次提交
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The zynq_sdhci drivers depends on DM_MMC in Kconfig so no need to check for DM_MMC in the driver so this patch removes it. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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This patch moves CONFIG_ZYNQ_HISPD_BROKEN to Kconfig Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 12 9月, 2019 2 次提交
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由 Yinbo Zhu 提交于
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a. This increases eMMC performance. Tuning procedure is currently not supported. Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Acked-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Yinbo Zhu 提交于
NXP fsl_esdhc controller supports two reference clocks: platform clock and peripheral clock Peripheral clock can provide higher clock frequency which is required to be used for tuning of SD UHS mode and eMMC HS200/HS400 modes. Peripheral clock is enabled by default by defining config option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes are supported. Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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- 07 9月, 2019 2 次提交
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由 Matthias Brugger 提交于
The bcm2711 has two emmc controllers. The difference is the clocks they use. Add support for the second emmc controller. Signed-off-by: NMatthias Brugger <mbrugger@suse.com> Signed-off-by: NAndrei Gherzan <andrei@balena.io>
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由 Raul Benet 提交于
Function bcm_2835_wait_transfer_complete() is not waiting long enough. The previous code was claiming to wait for ~1 seconds, but as it depends on register reads it's time actually varies. Some cards require wait times of up to ~56 ms to perform the command 'saveenv' on an EXT4 partition. Re-implement the loop exit condition to use get_timer() which allows to specify the wait time in more reliable manner. Set the maximum wait time to the originally intended 1 second. Signed-off by: Raul Benet <raul.benet_at_kaptivo.com> Signed-off-by: NMatthias Brugger <mbrugger@suse.com>
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- 06 9月, 2019 1 次提交
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由 T Karthik Reddy 提交于
The sdhci capabilities registers can be incorrect. The sdhci-caps-mask and sdhci-caps dt properties specify which bits of the registers are incorrect and what their values should be. This patch makes the sdhci driver use those properties to correct the caps. Also use "dev_read_u64_default" instead of "dev_read_u32_array" for caps mask. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 05 9月, 2019 6 次提交
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由 Bin Meng 提交于
The mmc_spi driver's priv is not available in its bind phase(). Use platdata instead. Fixes: 05e35d42 ("mmc: mmc_spi: Re-write driver using DM framework") Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Kever Yang 提交于
There are two cases not been considered: - use uint for timeout, it will overflow when size bigger than 512KB for it *8*1000 at the beginning, but we may use size up to 32MB; The 'timeout' will overflow if size bigger than 51.2MB after this fix, which should be enough for U-Boot; - The timeout is using clock speed for data rate, but the device may not have such high speed, eg. clock is 52MHz while the device write speed may be less than 10MB/s, and we may use up to 150MHz clock. Fix them in this patch, the max timeout is about 6500 when size is 32MB after fix. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Eddie James 提交于
Add support for the Aspeed SD host controller engine. Signed-off-by: NEddie James <eajames@linux.ibm.com> Reviewed-by: NCédric Le Goater <clg@kaod.org>
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由 Sam Protsenko 提交于
It's quite hard to figure out time units for various function that have timeout parameters. This leads to possible errors when one forgets to convert ms to us, for example. Let's rename those parameters correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues further. While at it, add time units info as comments to struct mmc fields. This commit doesn't change the behavior, only renames parameters names. Buildman should report no changes at all. Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NIgor Opaniuk <igor.opaniuk@gmail.com>
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由 Sam Protsenko 提交于
mmc_wait_dat0() expects timeout argument to be in usec units. But some overlying functions operate on timeout in msec units. Convert timeout from msec to usec when passing it to mmc_wait_dat0(). This fixes 'avb' commands on BeagleBoard X15, because next chain was failing: get_partition() -> mmc_switch_part() -> __mmc_switch() -> mmc_wait_dat0() when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0(). Fixes: bb98b8c5 ("mmc: During a switch, poll on dat0 if available and check the final status") Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org> Reviewed-by: NEugeniu Rosca <rosca.eugeniu@gmail.com> Tested-by: NEugeniu Rosca <rosca.eugeniu@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Tested-by: NIgor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: NIgor Opaniuk <igor.opaniuk@gmail.com>
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由 Andy Yan 提交于
When look through the code, I found this bare metal drives is not used, so remove it. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 31 8月, 2019 1 次提交
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由 Weijie Gao 提交于
eMMC device has multiple hw partitions both address from zero. However the mmc driver lacks block cache invalidation for switch hwpart. This causes a problem that data of current hw partition is cached before switching to another hw partition. And the following read operation of the latter hw partition will get wrong data when reading from the addresses that have been cached previously. To solve this problem, invalidate block cache after a successful mmc_switch_part() operation. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com> Tested-by: NFelix Brack <fb@ltec.ch>
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- 27 8月, 2019 3 次提交
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由 Christophe Kerello 提交于
This patch solves a watchdog reset issue during mmc erase command. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Patrice Chotard 提交于
host->mmc, host->mmc->dev and host->mmc->priv must be set before calling sdhci_setup_cfg() to avoid hang during mmc initialization. Thanks to commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") which put this issue into evidence. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Patrice Chotard 提交于
Increase SDMMC_BUSYD0END_TIMEOUT_US from 1s to 2s to avoid timeout error during blocks erase on some sdcard Issue seen on Kingston 16GB : Device: STM32 SDMMC2 Manufacturer ID: 27 OEM: 5048 Name: SD16G Bus Speed: 50000000 Mode: SD High Speed (50MHz) card capabilities: widths [4, 1] modes [SD Legacy, SD High Speed (50MHz)] host capabilities: widths [4, 1] modes [MMC legacy, SD Legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz)] Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 14.5 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes Issue reproduced with following command: STM32MP> mmc erase 0 100000 MMC erase: dev # 0, block # 0, count 1048576 ... mmc erase failed 16384 blocks erased: ERROR By setting SDMMC_BUSYD0END_TIMEOUT_US at 2 seconds and by adding time measurement in stm32_sdmmc2_end_cmd() as shown below: +start = get_timer(0); /* Polling status register */ ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask, SDMMC_BUSYD0END_TIMEOUT_US); +printf("time = %ld ms\n", get_timer(start)); We get the following trace: STM32MP> mmc erase 0 100000 MMC erase: dev # 0, block # 0, count 1048576 ... time = 17 ms time = 1 ms time = 1025 ms time = 54 ms time = 56 ms time = 1021 ms time = 57 ms time = 56 ms time = 1020 ms time = 53 ms time = 57 ms time = 1021 ms time = 53 ms time = 57 ms time = 1313 ms time = 54 ms time = 56 ms time = 1026 ms time = 54 ms time = 56 ms time = 1036 ms time = 54 ms time = 56 ms time = 1028 ms time = 53 ms time = 56 ms time = 1027 ms time = 54 ms time = 56 ms time = 1024 ms time = 54 ms time = 56 ms time = 1020 ms time = 54 ms time = 57 ms time = 1023 ms time = 54 ms time = 56 ms time = 1033 ms time = 53 ms time = 57 ms .... time = 53 ms time = 57 ms time = 1021 ms time = 56 ms time = 56 ms time = 1026 ms time = 54 ms time = 56 ms 1048576 blocks erased: OK We see that 1 second timeout is not enough, we also see one measurement up to 1313 ms. Set the timeout to 2 second to keep a security margin. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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- 24 8月, 2019 1 次提交
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由 Adam Ford 提交于
This converts the following to Kconfig: CONFIG_FSL_USDHC Signed-off-by: NAdam Ford <aford173@gmail.com> [trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 22 8月, 2019 1 次提交
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由 Fabien Parent 提交于
Add support for the MT8183 in the MediaTek MMC driver. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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- 21 8月, 2019 1 次提交
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由 Fabien Parent 提交于
Add support for the MT8183 in the MediaTek MMC driver. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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- 12 8月, 2019 1 次提交
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由 Manivannan Sadhasivam 提交于
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc driver. Since HI3660 operates at different clock rate and uses fifo mode now, let's introduce the platform data and utilize it for different SoCs supported by this driver. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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- 10 8月, 2019 1 次提交
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由 Trent Piepho 提交于
This is a configuration option specific to the tegra controller. Doing it this way makes it show up directly under the tegra controller option, indented one level, as "Disable external clock loopback". The way it is now, it shows up at the end of the controller list, not indented, as if it's some kind of generic MMC configuration option. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: NTrent Piepho <tpiepho@impinj.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 09 8月, 2019 9 次提交
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Matthias Brugger <mbrugger@suse.com> Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com> Tested-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Matwey V. Kornilov 提交于
Since commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Move the mmc field initialization before sdhci_setup_cfg() call to avoid crash on mmc pointer dereference. [this patch is based on commit 41a9fab8 ("mmc: mv_sdhci: fix uninitialized pointer deref on probe") by Baruch Siach] Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Baruch Siach <baruch@tkos.co.il> Signed-off-by: NMatwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu102/zc706)
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由 Faiz Abbas 提交于
Select SPL_HS200_SUPPORT if SPL_HS400_SUPPORT is selected as is being done for the U-boot case. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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- 31 7月, 2019 5 次提交
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由 Baruch Siach 提交于
The comment about init op being NULL used to be next to the NULL check code. Commit 8ca51e51 ("dm: mmc: Add a way to use driver model for MMC operations") separated the comment from the code. Put them back together. Fixes: 8ca51e51 ("dm: mmc: Add a way to use driver model for MMC operations") Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Weijie Gao 提交于
When reading large data in once (reading 512MiB is tested on MT7623), a watchdog timeout is triggered due to watchdog not being fed. This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will be fed every 1024 blocks are read/written. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Baruch Siach 提交于
The standard property name for chip-detect gpio is "cd-gpios". All in-tree DT files use only this name. Fixes: 451931ea ("mmc: sdhci: Read cd-gpio from devicetree") Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Baruch Siach 提交于
Since commit 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Move the mmc field initialization before sdhci_setup_cfg() call to avoid crash on mmc pointer dereference. Fixes: 3d296365 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
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由 Urja Rannikko 提交于
Fixes the microSD slot on the ASUS C201. Signed-off-by: NUrja Rannikko <urjaman@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com<mailto:peng.fan@nxp.com>>
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- 27 7月, 2019 1 次提交
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由 Faiz Abbas 提交于
The j721e 4 bit instances don't have a hard DLL and therefore don't need any DLL related configurations. Split the compatibles into an 8 bit and a 4 bit one. Add a private flags field which can be used to check if the DLL is present and don't register the set_ios_post callback for the 4 bit compatible instances. Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot with the new compatibles. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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- 20 7月, 2019 1 次提交
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由 Kever Yang 提交于
This patch fix mmc driver abort caused by below patch: 3d296365 mmc: sdhci: Add support for sdhci-caps-mask After the patch sdhci_setup_cfg() access to host->mmc->dev, so we have to do init before make the call to the function() Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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- 18 7月, 2019 1 次提交
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由 Anup Patel 提交于
Most DM based SPI host controller drivers use SPI_XFER_BEGIN and SPI_XFER_END flags to enable/disable slave chip select. This patch extends MMC SPI driver to pass SPI_XFER_BEGIN flag when MMC command is send at start and pass SPI_XFER_END flag using a dummy transfer (of bitlen = 0) at the end of MMC command. Suggested-by: NJagan Teki <jagan@amarulasolutions.com> Signed-off-by: NAnup Patel <anup.patel@wdc.com> Tested-by: NSagar Kadam <sagar.kadam@sifive.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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- 17 7月, 2019 1 次提交
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由 Andreas Dannenberg 提交于
We would like to use the driver even without power domains being specified for cases such as during early boot when the required power domains have already gotten enabled by the SoC's boot ROM and such explicit initialization is not needed and possible. Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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