LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021ATWR board.
 One DDR controller
 DUART1 is used as the console

For the detail board information, please refer to README.
Signed-off-by: NChen Lu <chen.lu@freescale.com>
Signed-off-by: NYuan Yao <yao.yuan@freescale.com>
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021AQDS board.
 One DDR controller
 DUART1 is used as the console

For the detail board information, please refer to README.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Signed-off-by: NJason Jin <jason.jin@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NYuan Yao <yao.yuan@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.
Signed-off-by: NYork Sun <yorksun@freescale.com>

Reading DDR register should use ddr_in32() for proper endianess.
This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: NYork Sun <yorksun@freescale.com>

If less than 8 ECC pins are used for DDR data bus width smaller than 64
bits, the 8-bit ECC code will be transmitted/received across several beats,
and it will be used to check 64-bits of data once 8-bits of ECC are
accumulated.
Signed-off-by: NYork Sun <yorksun@freescale.com>

For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.

For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

This patch is to add etsec support for LS102xA. First, Little-endian
descriptor mode should be enabled. So RxBDs and TxBDs are interpreted
with little-endian byte ordering. Second, TSEC_SIZE and TSEC_MDIO_OFFSET
are different from PowerPC, redefine them for LS1021xA.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

Use mb() instead of sync assembly instruction to be
compatible for both ARM and PowerPC.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch independent fsl_mdio.h.

To remove the arch dependency, merge the content of
asm/fsl_enet.h into fsl_mdio.h.
Some files (like fm_eth.h) were simply including fsl_enet.h
only for phy.h. These were updated to include phy.h instead.
Signed-off-by: NClaudiu Manoil <claudiu.manoil@freescale.com>

The existing i.MX's I2C driver mxc_i2c.c is compatible
with the controller of LS102xA. As I2C's registers
are 8-bit on LS102xA, I2C_QUIRK_REG is enabled to
use 8-bit driver.

This patch is to add I2C 1,2,3 support for LS102xA.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Signed-off-by: NJason Jin <jason.jin@freescale.com>
Signed-off-by: NJingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>

Signed-off-by: NTom Rini <trini@ti.com>

When enable debug option to compile, it will give the following
warning, this patch is used to get rid of it.
--->8---
warning: 'flags' is used uninitialized in this function [-Wuninitialized]
---8<---
Signed-off-by: NBo Shen <voice.shen@atmel.com>

When enable debug option to compile, it will give the following
warning, this patch is used to get rid of it.
--->8---
warning: 'flags' is used uninitialized in this function [-Wuninitialized]
---8<---
Signed-off-by: NBo Shen <voice.shen@atmel.com>

This allows the USB code to determine whether a USB bus reset was issued,
which in turn allows the code to differentiate between a detach (return
to shell prompt) and a board reset/reboot request.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

New dfu_usb_get_reset() method is necessary to distinct two different
use cases of dfu-util program.
This method checks if the USB bus reset has been really performed after
DFU DETACH.

Without this function the previous DFU behavior is preserved.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>

This commit provides distinction between DFU device detach and reset.
The -R behavior is preserved with proper handling of the dfu-util's -e
switch, which detach the DFU device.

By running dfu-util -e; one can force device to finish the execution of
dfu command on target and execute some other scripted commands.

Moreover, some naming has been changed - the dfu_reset() method now is known
as dfu_detach(). New name better reflects the purpose of the code.

It was also necessary to increase the number of usb_gadget_handle_interrupts()
calls since we also must wait for detection of the USB reset event.

Example usage:
1. -e (detach) switch
 dfu-util -a0 -D file1.bin;dfu-util -a3 -D uImage;dfu-util -e

 access to u-boot prompt.

2. -R (reset) switch
 dfu-util -a0 -D file1.bin;dfu-util -R -a3 -D uImage

 target board reset
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>

Some drivers (e.g. net/e1000) reference these functions. So, this
fixes the build of MVBC_P board.

I'm not familiar with the MPC5xxx platform, maybe a full
implementation shall be implemented instead of this stub in the
future.
Signed-off-by: NVasili Galka <vvv444@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>, Marek Vasut <marex@denx.de>
Acked-by: NWolfgang Denk <wd@denx.de>

Add a bank of GPIOs for sandbox which can be used for testing this
functionality.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The gpio command mostly relies on gpio_request() and gpio_free() being
nops, in that you can request a GPIO twice. With driver model this is
now implemented correctly, so it fails.

Change the command to deal with a failure to claim the GPIO.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The GPIO list is very long in many cases and most of them are not used.
By default, show only the GPIOs that are in use, and provide a flag to show
all of them. This makes the 'gpio status' command much more pleasant.

In order to do this, driver model now exposes a method for obtaining the
'function' of a GPIO, which describes whether it is an input or output, for
example. Implementation of this method is optional.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The QS Systems TQMa6 board support was added by commit cb07d74e
and lost by commit e82abaeb.

Commit e82abaeb merged the IMX branch based on pre-Kconfig
and the mainline based on post-Kconfig, simply deleting
the boards.cfg file.  As a result, some boards added just before
the merge were lost.

This commit adds Kconfig, defconfig, MAINTAINERS for TQMa6 board
to work on the Kconfig infrastructure.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Stefano Babic <sbabic@denx.de>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Nomadik board select menu to nomadik/Kconfig.

Move also common settings (CONFIG_SYS_CPU="arm926ejs" and
CONFIG_SYS_SOC="nomadik").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Move Highbank-specific settings to highbank/Kconfig.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rob Herring <robh@kernel.org>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Orion5x board select menu to orion5x/Kconfig.

Move also common settings (CONFIG_SYS_CPU="arm926ejs" and
CONFIG_SYS_SOC="orion5x").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Keystone board select menu to keystone/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="keystone").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NTom Rini <trini@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP5 board select menu to omap5/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap5").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NTom Rini <trini@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP4 board select menu to omap4/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap4").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NTom Rini <trini@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP3 board select menu to omap3/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap3
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NTom Rini <trini@ti.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Davinci board select menu to davinci/Kconfig.

Move also common settings (CONFIG_SYS_CPU="arm926ejs" and
CONFIG_SYS_SOC="davinci").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NTom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Exynos board select menu to exynos/Kconfig.

Consolidate also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="exynos").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the KirkWood board select menu to kirkwood/Kconfig.

Consolidate also common settings (CONFIG_SYS_CPU="arm926ejs" and
CONFIG_SYS_SOC="kirkwood").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NPrafulla Wadasdkar <prafulla@marvell.com>
Cc: Luka Perkov <luka@openwrt.org>

Move Versatile-specific settings to versatile/Kconfig.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Rmobile board select menu to rmobile/Kconfig.

Consolidate also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="rmobile").
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Becuase the board select menu in arch/arm/Kconfig is too big,
move the Tegra board select menu to tegra/Kconfig.

Insert the Tegra SoC select menu between the arch select and the
board select.

 Architecture select
 |-- Tegra Platform (Tegra)
     |- Tegra SoC select (Tegra20 / 30 / 114 / 124)
        |- Board select

Consolidate also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="tegra*") and always "select" CONFIG_SPL as follows:

  config TEGRA
          bool
          select SPL
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>