- 13 3月, 2015 11 次提交
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由 Nishanth Menon 提交于
Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic. Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
Update to existing recommendation for L2ACTLR configuration to prevent system instability and optimize performance. These apply to both OMAP5 and DRA7. Reported-by: NVivek Chengalvala <vchengalvala@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Praveen Rao 提交于
This patch enables the workaround for ARM errata 798870 for OMAP5 / DRA7 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced here as well. Signed-off-by: NPraveen Rao <prao@ti.com> Signed-off-by: NAngela Stegmaier <angelabaker@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced. As part of this change, move to using the generic lowlevel_init.S for omap3 as well. Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
This is in preperation of using generic cross OMAP code. Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup PL310 control register, however, that is something that is generic enough to be used for OMAP5 generation of processors as well. The only difference being the service being invoked for the function. So, convert the service to a macro and use a generic name (same as that used in Linux for some consistency). While at that, also add a data barrier which is necessary as per recommendation. While at this, smc #0 is maintained as handcoded assembly thanks to various gcc version eccentricities, discussion thread: http://marc.info/?t=142542166800001&r=1&w=2Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
621766: Under a specific set of conditions, executing a sequence of NEON or vfp load instructions can cause processor deadlock Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set L1NEON to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
430973: Stale prediction on replaced inter working branch causes Cortex-A8 to execute in the wrong ARM/Thumb state Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1 Also provide a hook for SoC specific handling to take place if needed. Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Nishanth Menon 提交于
Add workaround for Cortex-A15 ARM erratum 798870 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." Implementations for SoC families such as Exynos, OMAP5/DRA7 etc will be widely different. Every SoC has slightly different manner of setting up access to L2ACLR and similar registers since the Secure Monitor handling of Secure Monitor Call(smc) is diverse. Hence an weak function is introduced which may be overriden to implement SoC specific accessor implementation. Based on ARM errata Document revision 18.0 (22 Nov 2013) Signed-off-by: NNishanth Menon <nm@ti.com> Tested-by: NMatt Porter <mporter@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
The purpose of this build target is to do SPL over USB RNDIS. We remove YMODEM, MMC and NAND (and re-set ENV to be built-in) as when those are needed we can use the other build targets. This brings us well under size limit again. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 11 3月, 2015 1 次提交
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git://git.denx.de/u-boot-tegra由 Tom Rini 提交于
Conflicts: README Signed-off-by: NTom Rini <trini@konsulko.com>
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- 10 3月, 2015 13 次提交
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由 Hans de Goede 提交于
Fix a typo in board/sunxi/Kconfig which caused VIDEO_LCD_PANEL_I2C to be enabled on all sunxi boards. Also fix a compile error which shows up once VIDEO_LCD_PANEL_I2C is actually disabled on most boards as it should be. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Aleksei Mamlin 提交于
This patch add support for Wexler TAB7200 tablet. The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480), capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot, mini HDMI port, 3.5mm audio plug, 1 USB OTG port and 1 USB 2.0 port. Signed-off-by: NAleksei Mamlin <mamlinav@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
Use the AXP223 PMIC to detect VBUS for musb otg support. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
This enables the musb glue layer to use the AXP221's VBUS detection function to check for VBUS. This fixes otg support on the A23 q8h tablets. Note that u-boot never calls musb_shutdown(), so once VBUS is enabled, it is never disabled until the system is powered off, or the OS does so. This can be used to our advantage to keep VBUS powered into the OS, where support for AXP221 is not available yet. Fixes: 52defe8f ("sunxi: musb: Check Vbus-det before enabling otg port power") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
Some of the AXP PMICs support VBUS detection, i.e. checking whether VBUS power input is available and usable (supplied by an external source). A few boards use this instead of a separate GPIO to detect VBUS on USB OTG. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Hans de Goede 提交于
The Orange Pi Mini is an A20 based development board featuring 1G RAM, HDMI, 1Gbit ethernet, USB wifi, SATA, 2 sdcard slots (use the top one for booting), 2 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Orange Pi is an A20 based development board featuring 1G RAM, HDMI & VGA, 1Gbit ethernet, USB wifi, SATA, 4 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND, sdio wifi, 1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen and a ton of IO connectors. Note there seem to be multiple sdcard slots on the board (4 in total), but other then mmc0 none of these are hooked up by default, there is a ton of dip-switches which likely allow hooking some of these up, but the documentation of the board only describes the use of a fraction of them, so for now we only support mmc0. Also see: http://www.merrii.com/en/pla_d.asp?id=163Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Jens Lucius 提交于
The Forfun Q88DB is an A13 tablet in the common Q8 format. Features are 512MB RAM, 4GB NAND, 7" Display, RTL8188 Wifi, 2 cameras. For more details see: http://linux-sunxi.org/Forfun_Q88DBSigned-off-by: NJens Lucius <info@jenslucius.com> Acked-by: NIan Campbell <ijc@hellion.org.uk> Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
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由 Marcus Cooper 提交于
The Mele I7 is a Allwinner based Android TV box. It features a A31 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, SPDIF, IrDA, 3 USB A, 1 USB micro OTG and Wireless LAN. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Marcus Cooper 提交于
The MK808C is a Allwinner based Android TV dongle. It features a A20 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, 1 USB A, 1 USB mini OTG, Bluetooth and Wireless LAN. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Gábor Nyers 提交于
The Jesurun Q5 has a black plastic casing with the approximate dimensions of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can be extended up to 32GB with a MicroSD card. The external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to power) and an programmable green led. On the board there is also an unpopulated IR receiver and the UART. The devices is equipped with an AXP209 PMU. For more details see: http://linux-sunxi.org/Jesurun_Q5Signed-off-by: NGábor Nyers <gnyers@opensuse.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Adam Sampson 提交于
The tpr3 (timing skew) parameter is used in all supported versions of the sunxi DRAM controller, but it was only enabled for sun4i in 47e3501a. Signed-off-by: NAdam Sampson <ats@offog.org> Acked-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 09 3月, 2015 14 次提交
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Added support to disable the start of application by using a environment variable autostart Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Linus Walleij 提交于
While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jan Kiszka 提交于
This fixes a regression of e310b93e, affecting Ethernet on the Jetson TK1, e.g. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
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由 Tom Rini 提交于
The way the PSCI DT update happens currently means we pull in <asm/armv7.h> everywhere, including on ARMv8 and that in turn brings in <asm/io.h> for some non-PSCI related things that header needs to deal with. To fix this, we rework the hook slightly. A good portion of arch/arm/cpu/armv7/virt-dt.c is common looking and I hope that when PSCI is needed on ARMv8 we can re-use this by and large. So rename the current hook to psci_update_dt(), move the prototype to <asm/psci.h> and add an #ifdef that will make re-use later easier. Reported-by: NYork Sun <yorksun@freescale.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: York Sun <yorksun@freescale.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: NTom Rini <trini@konsulko.com> Acked-by: NYork Sun <yorksun@freescale.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Warren <twarren.nvidia@gmail.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Rini <trini@konsulko.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Odroid XU3 by disabling the memset at malloc init. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Odroid X2/U3 by disabling the memset at malloc init. This was tested on Odroid X2. A quick test with checking gpio pin state using the oscilloscope. Boot time from start to bootcmd (change gpio state by memory write command): - ~228ms - before this change (arch memset enabled for .bss clear) - ~100ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Trats2 by disabling the memset at malloc init. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~464ms - before this change (arch memset enabled for .bss clear) - ~341ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
This commit introduces new config: CONFIG_SYS_MALLOC_CLEAR_ON_INIT. This config is an expert option and is enabled by default. The all amount of memory reserved for the malloc, is by default set to zero in mem_malloc_init(). When the malloc reserved memory exceeds few MiB, then the boot process can slow down. So disabling this config, is an expert option to reduce the boot time, and can be disabled by Kconfig. Note: After disable this option, only calloc() will return the pointer to the zeroed memory area. Previously, without this option, the memory pointed to untouched malloc memory region, was filled with zeros. So it means, that code with malloc() calls should be reexamined. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
For writing files, DFU implementation requires the file buffer with the len at least of file size. For big files it requires the same big buffer. Previously the file buffer was allocated as a static variable, so it was a part of U-Boot .bss section. For 32MiB len of buffer we have 32MiB of additional space, required for this section. The .bss needs to be cleared after the relocation. This introduces an additional boot delay at every start, but usually the dfu feature is not required at the standard boot, so the buffer should be allocated only if required. This patch removes the static allocation of this buffer, and alloc it with memalign after first call of function: - dfu_fill_entity_mmc() and the buffer is freed on dfu_free_entity() call. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~888ms - before this change (arch memset enabled for .bss clear) - ~464ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> Cc: Marek Vasut <marek.vasut@gmail.com>
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由 Przemyslaw Marczak 提交于
For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY, will highly increase the memset/memcpy performance. This is able thanks to the ARM multiple register instructions. Unfortunatelly the relocation is done without the cache enabled, so it takes some time, but zeroing the BSS memory takes much more longer, especially for the configs with big static buffers. A quick test confirms, that the boot time improvement after using the arch memcpy for relocation has no significant meaning. The same test confirms that enable the memset for zeroing BSS, reduces the boot time. So this patch enables the arch memset for zeroing the BSS after the relocation process. For ARM boards, this can be enabled in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1384ms - before this change - ~888ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com>
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由 Przemyslaw Marczak 提交于
This commit enables the following configs: - CONFIG_USE_ARCH_MEMCPY - CONFIG_USE_ARCH_MEMSET This increases the performance of memcpy/memset and also reduces the boot time. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1527ms - before this change (arch memset enabled for .bss clear) - ~1384ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
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- 08 3月, 2015 1 次提交
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