- 10 8月, 2013 14 次提交
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由 York Sun 提交于
JEDEC spec requires the clocks to be stable before deasserting reset signal for RDIMMs. Clocks start when any chip select is enabled and clock control register is set. This patch also adds the interface to toggle memory reset signal if needed by the boards. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
On selected platforms, x4 DDR devices can be supported. Using x4 devices may lower the performance, but generally they are available for higher density. Tested on MT36JSF2G72PZ-1G9E1 RDIMM. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
RDIMM has different timing. Tested RDIMM is MT18JSF1G72PDZ-1G9E1 for dual rank. Single- and quad-rank are not tested due to availability. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
When chip select interleaving is enabled, cs0_bnds is used for address binding. Other csn_bnds are not used. When two controllers interleaving is enabled, cs0_bnds of both controllers are used, other csn_bnds are not. However, the unused csn_bnds may be used internally for calculating addresses for calibration. Setting those registers to 0 may confuse controllers in some cases. Instead, setting them to 0xffffffff together with normal LAWs will guarantee the address is not mapped to DDR. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Add emulator support for T4240. Emulator has limited peripherals and interfaces. Difference between emulator and T4240QDS includes: ECC for DDR is disabled due the procedure to load images No board FPGA (QIXIS) NOR flash has 32-bit port for higher loading speed IFC and I2C timing don't really matter, so set them fast No ethernet Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
The RCW print is common for all corenet platforms. Not necessary to ducplicate in each board file. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
CONFIG_PHYS_64BIT is always defined for t4qds. Removed unused #ifdef. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
FMAN firmware can be in NOR flash, NAND flash, SPI flash, MMC or even remote. In case none of them is defined, set it to null. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board specific feature and belongs to SoC header. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Liu Gang 提交于
For T4 platform, the SRIO LIODN registers are in SRIO address space and not in GUTs. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
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由 Liu Gang 提交于
For B4, the SRIO LIODN registers are in SRIO address space and not in GUTs. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
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由 Liu Gang 提交于
For some PowerPC platforms, LIODN registers for SRIO ports are in SRIO register address space. So the ccsr_rio structure should be updated for those LIODN registers. In addition, add a new macro "SET_SRIO_LIODN_BASE" to create the SRIO LIODN ID table based on the SRIO LIODN register address. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com>
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由 Xie Xiaobo 提交于
TWR-P1025 Specification: ----------------------- Memory subsystem: 512MB DDR3 (on board DDR) 64Mbyte 16bit NOR flash One microSD Card slot Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC3: Connected to Atheros AR8035 GETH PHY UART: Two UARTs are routed to the FDTI dual USB to RS232 convertor USB: Two USB2.0 Type A ports I2C: AT24C01B 1K Board EEPROM (8 bit address) QUICC Engine: Connected to DP83849i PHY supply two 10/100M ethernet ports QE UART for RS485 or RS232 PCIE: One mini-PCIE slot Signed-off-by: NMichael Johnston <michael.johnston@freescale.com> Signed-off-by: NXie Xiaobo <X.Xie@freescale.com> [yorksun: Fixup include/configs/p1_twr.h] Signed-off-by: NYork Sun <yorksun@freescale.com>
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- 06 8月, 2013 1 次提交
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- 03 8月, 2013 10 次提交
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由 Marek Vasut 提交于
In case only the CONFIG_SYS_I2C_SPEED is set in configuration file, the CONFIG_SYS_I2C_SOFT_SPEED is defined as CONFIG_SYS_I2C_SPEED. The CONFIG_SYS_I2C_SOFT_SPEED is then used throughout the driver. Unfortunatelly, due to a typo in the driver, instead of defining CONFIG_SYS_I2C_SOFT_SPEED, an CONFIG_SYS_SOFT_I2C_SPEED was defined and therefore the driver failed to compile. The same applies for CONFIG_SYS_I2C_SOFT_SLAVE , where the swap happens as well. This patch fixes the issue. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
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由 Stephen Warren 提交于
This brings U-Boot's cpp invocation into line with the way the Linux kernel invokes cpp on device trees. Consistency will be useful to ensure *.dts is portable between the two. -undef also has the added advantage of not defining "linux", so DT property names such as "linux,keymap" don't get mangled. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
Recent dtc supports #line directives in the input source code, and even uses them to generate useful line numbers in any messages it emits. Stop passing -P to cpp, since there's no need any more. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
Now that nothing uses CONFIG_ARCH_DEVICE_TREE, stop defining it. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
Now that nothing uses the defines ARCH_CPU_DTS, BOARD_DTS, stop defining them. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
Now that we assume dtc supports the -i option, we don't need to use ARCH_CPU_DTS in *.dts{,i}; we simply specify the include filename directly, and dtc will find it. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
*.dts may use #include (via cpp) or /include/ (via dtc; assuming a newer dtc). The choice is up to the creator of the DT. Create a common variable DTC_INCDIRS that lists the paths searched by include statements, and update cpp and dtc invocation to use them. For cpp, also specify -nostdinc to ensure the same set of paths is available to both type of include statement. For dtc, create a new DTC_FLAGS variable to hold all the flags passed to dtc. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
The invocation of dtc is significantly more complex that it could be, in order to work around an issue on old versions of dtc, which print a message to stdout every time they run. Remove this workaround, on the assumption that people have or will upgrade to a newer version of dtc. This simplifies the build rule significantly. Related, split the invocation of cpp and dtc into separate commands rather than a pipeline, so that if either fail, it is detected. This has the nice benefit of saving off the result of the pre-processing step, allowing it to be easily inspected. Assuming a new enough dtc (which an earlier patch enforces), dtc will parse #line directives in its input file, and generate correct file and line numbers in error messages, even though cpp is unconditionally applied to its input file. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stephen Warren 提交于
Aside from microblaze, all other SoCs/boards/vendors store their DT files in board/$vendor/dts/$soc-$board.dts. Move microblaze-generic.dts to this location for consistency. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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由 Stephen Warren 提交于
Subsequent patches assume that dtc supports various recent features. These are available in dtc 1.4.0. Validate that dtc is at least that version. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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- 01 8月, 2013 1 次提交
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- 31 7月, 2013 5 次提交
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由 Axel Lin 提交于
Use DIV_ROUND_UP to simplify the code. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
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由 Axel Lin 提交于
Current code uses gd->baudrate before setting its value. Besides, I got below build warning which is introduced by commit ddb5c5be "blackfin: add baudrate to bdinfo". board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer from integer without a cast [enabled by default] include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type 'unsigned int' This patch ensures we get the baudrate setting before using it. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
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由 Axel Lin 提交于
The function return from P_FUNCT2MUX(per) takes 2 bits, however for BF537_FAMILY with offset != 1 the function is 1 bit. Also has small refactor for better readability. In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);" while in current code we do muxreg |= (function << offset);. Signed-off-by: NAxel Lin <axel.lin@ingics.com>
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由 Axel Lin 提交于
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
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由 Axel Lin 提交于
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
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- 30 7月, 2013 9 次提交
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由 Masahiro Yamada 提交于
This commit adds some prototypes into include/mtd/cfi_flash.h. These functions are defined with a weak attribute in drivers/mtd/cfi_flash.c. This means they can be overrided by board-specific ones if necessary. When defining such functions under board/ directory or somewhere, cfi_flash.h should be included. This makes sure that board-specfic cfi functions are defined in a correct prototype. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Nikita Kiryanov 提交于
usb_lowlevel_init() allocates a new periodic_list each time it is invoked, without freeing the original list. Since it is initialized later on in the code, just reuse the first-allocated list in future invocations of usb_lowlevel_init. Cc: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
When power cycling the hub ports, a misbehaving port will prevent all ports from being powered on because we quit at the first sign of trouble. Skip problematic ports instead of failing the entire power on. Cc: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Roger Quadros 提交于
Fixes NFS root problems with Beagle (3530 ES1.0) when used with external USB-ethernet adapter and "USB start" command used within u-boot. Soft resetting the UHH module causes instability issues on all OMAPs so we just avoid it. See OMAP36xx Errata i571: USB host EHCI may stall when entering smart-standby mode i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock On OMAP4/5, soft-resetting the UHH module can put it into Smart-Idle mode and lead to a deadlock. On OMAP3 this doesn't seem to be the case but still instabilities are observed on beagle (3530 ES1.0) if soft-reset is used. e.g. NFS root failures with Linux kernel. Signed-off-by: NRoger Quadros <rogerq@ti.com>
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由 Lukasz Majewski 提交于
This patch extends dfu code to support transmission with -R switch specified at dfu-util. When -R is specified, the extra USB_REQ_DFU_DETACH request is sent after successful data transmission. Then dfu resources are released and reset command is issued. Signed-off-by: NLukasz Majewski <l.majewski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Marek Vasut 提交于
The requests sent to the controller are not properly cache aligned most of the time, thus implement a simple bounce buffer to avoid problem with cache. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
Implement functions to flush/invalidate dcache over QH and qTDs and make use of them where appropriate. Also use them to replace the old incorrect cache management attempt. This is the first step towards making this driver work with data cache enabled. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
The code for retrieving qTD item for particular endpoint is hard to understand, moreover it's duplicated all over the driver. Move the code into single nice and documented function. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
Allocate the qTD items all at once instead of allocating them separately. Moreover, make sure each qTD is properly aligned to 32-bytes boundary and that cache can be safely flushed over each qTD touple. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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