- 04 11月, 2019 9 次提交
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由 Lukasz Majewski 提交于
This commit converts mccmon6's u-boot proper (in a single commit to avoid build breaks) to use solely DM/DTS. The DTS description of the mccmon6 has been ported from Linux kernel (v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be) Signed-off-by: NLukasz Majewski <lukma@denx.de>
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由 Lukasz Majewski 提交于
The TPC70 is equipped with DS1307 RTC device. Add code to enable support for it. Signed-off-by: NLukasz Majewski <lukma@denx.de>
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由 Igor Opaniuk 提交于
Add u-boot,dm-pre-reloc properties for uart pinmux configuration nodes, which enables UART as early as possible (before relocation). Without this we miss almost the half of output (U-boot version, CPU defails, Reset cause, DRAM details etc.). Fixes: cd69e8ef ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm") Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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由 Igor Opaniuk 提交于
Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to keep original imx6ull-colibri.dts in sync with Linux. Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi + additionally fix checkpatch warnings. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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由 Marek Vasut 提交于
According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating Conditions, page 16, the VDDD should be set to 1.55V when the CPU is operating at 454MHz. This is the case in U-Boot, hence increase the VDDD voltage. This fixes instability when performing TFTP transfers. Increase the brownout threshold to 1.4V. The documentation recommends 1.45V setting for the brownout, however, this triggers failure during power block init, so keep the brownout slightly lower. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NFabio Estevam <festevam@gmail.com>
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由 Claudius Heine 提交于
Signed-off-by: NClaudius Heine <ch@denx.de>
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由 Claudius Heine 提交于
imx6_is_bmode_from_gpr9 always returns false, because IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return. This moves the function body into imx6_src_get_boot_mode, since that is the only one using it and it is on the same abstraction level (accessing registers directly). Signed-off-by: NClaudius Heine <ch@denx.de>
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由 Manivannan Sadhasivam 提交于
Add devicetree support for iMXQXP AI_ML board from Einfochips. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NLukasz Majewski <lukma@denx.de>
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由 Parthiban Nallathambi 提交于
Firmware Configuration Block(FCB) for imx6ul(l) needs to be BCH encoded. Signed-off-by: NParthiban Nallathambi <pn@denx.de> Acked-by: NShyam Saini <shyam.saini@amarulasolutions.com> Acked-by: NPeng Fan <peng.fan@nxp.com>
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- 03 11月, 2019 2 次提交
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由 Fabio Estevam 提交于
Introduce disable_ipu_clock(). This is done in preparation for configuring the NoC registers on i.MX6QP in SPL. Afer the NoC registers are set the IPU clocks can be disabled. Signed-off-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Fabio Estevam 提交于
The code can be made simpler by using setbits_le32(), so switch to it. Signed-off-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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- 31 10月, 2019 1 次提交
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由 Marek Vasut 提交于
Add get_timer_us(), which is useful e.g. when we need higher precision timestamps. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> [trini: Fixup arch/arm/mach-bcm283x/include/mach/timer.h] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 30 10月, 2019 1 次提交
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由 Bin Meng 提交于
At present some boards generate kwbimage.cfg in the source tree during the build. This breaks buildman testing on some systems where the source tree is read-only. Update makefile rules to generate it in the build tree instead. Note some other boards have the kwbimage.cfg file written in advance, hence we need check if the file exists in the build tree first, otherwise we fall back to one in the source tree. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 28 10月, 2019 2 次提交
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由 Simon Glass 提交于
This function needs a prototype so that tests can use it. Add one. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This function writes to its address so the address should not be declared as const. Fix it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 26 10月, 2019 8 次提交
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由 Suman Anna 提交于
Add the address spaces for the R5F cores in MCU domain to the ranges property of the cbass_mcu interconnect node so that the addresses within the R5F nodes can be translated properly by the relevant OF address API. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
Use the 3733MTs DDR configuration that is auto generated from DDR_Regconfig tool. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NKevin Scholz <k-scholz@ti.com>
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由 James Doublesin 提交于
Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: NJames Doublesin <doublesin@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 James Doublesin 提交于
The current configuration of DDR on AM654 base board is for 1600MTs but the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi. Since 1600MHz is misleading, rename it to k3-am654-base-board-ddr4-1600MTs.dtsi Signed-off-by: NJames Doublesin <doublesin@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux by set/way in cleanup_before_linux(). Additionally there is a custom hook provided to clean and invalidate L3 cache. Unfortunately on K3 devices(having a coherent architecture), there is no easy way to quickly clean all the cache lines for L3. The entire address range needs to be cleaned and invalidated by Virtual Address. This can be implemented using the L3 custom hook but it take lot of time to clean the entire address range. In the interest of boot time this might not be a viable solution. The best hit is to make sure the loaded Linux image is flushed so that the entire image is written to DDR from L3. When Linux starts running with caches disabled the full image is available from DDR. Reported-by: NAndrew F. Davis <afd@ti.com> Reported-by: NFaiz Abbas <faiz_abbas@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
Once the arch specific boot_prepare_linux completes, boards wants to have a custom preparation for linux. Add support for a custom board_prep_linux. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Faiz Abbas 提交于
Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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- 25 10月, 2019 17 次提交
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由 Weijie Gao 提交于
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the system, they should be always selected. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds default eth pinctrl for all boards. There are two pinctrl nodes used for two scenarios: ephy_iot_mode - for IOT boards which have only one port (PHY0) ephy_router_mode - For routers which have more than one ports Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This adds default pinctrl (dual SPI chip select) for gardena smart gateway Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds mmc related nodes for mt7628an.dtsi Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds default p0led status and phy0 link polling for all boards. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch updates reset controller node for mt7628 Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds default pinctrl for uart nodes Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds pinctrl node with default pin state for mt7628an.dtsi. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
This patch adds clkctrl node for mt7628 and adds clocks property for some node. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which support baudrate up to 921600. The high-speed UART is compatible with ns16550 when baudrate <= 115200. Add compatible string to dtsi file so u-boot can use it when serial_mtk driver is built in. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
The UART of MT7628 has fixed 40MHz input clock so there is no need to put clock-frequency in every dts files. Just put it into the common dtsi file. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Álvaro Fernández Rojas 提交于
Fixes commit 344db3f3, which added missing bmips dtbs depending on their SoCs. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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