- 31 5月, 2017 18 次提交
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
As far as I know BCM3380 has a fixed CPU frequency since I couldn't find its PLL registers in any documentation. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This is done in order to reuse ram size calculation for BCM6338/BCM6348 Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Use a generic name for cpu_desc functions instead of using a specific SoC one. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Add a new sysreset driver that uses the recently added watchdog support. It performs a full SoC reset by calling wdt_expire_now op. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver controls the watchdog present on this SoC. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver controls the watchdog present on this SoC. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver controls the watchdog present on this SoC. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
This driver is a simplified version of linux/drivers/watchdog/bcm63xx_wdt.c Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 29 5月, 2017 6 次提交
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由 Philipp Tomsich 提交于
Adding documentation on the new config properties: 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Philipp Tomsich 提交于
This introduces the ability to override the environment offets from the device tree by setting the following nodes in '/config': 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND To keep with the previous logic, the CONFIG_* defines still need to be available and the statically defined values become the defaults, when the corresponding properties are not set in the device-tree. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Keerthy 提交于
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask. Source: http://www.ti.com/lit/ds/symlink/tps65218.pdfSigned-off-by: NKeerthy <j-keerthy@ti.com> Fixes: 86db550b ("power: Add support for the TPS65218 PMIC") Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Heiner Kallweit 提交于
Number of blocks is a 9 bit field where 0 stands for a unlimited number of blocks. Therefore the max number of blocks which can be set is 511. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
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由 Tom Rini 提交于
Inside of max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we check that the value we calculate is >= 0 however we declare 'hex' as unsigned int making these always true. Mark these as 'int' instead. We also move hex_max to int as they are constants that are 0x3f/0xff. Given that the above functions are marked as returning an int, make the variables we assign their return value to also be int to be able to catch the error condition now. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
In some places we check if part_config is set to MMCPART_NOAVAILABLE (0xff). With part_config being a char this is always false. We should be using a u8 to store this value instead, after a quick consultation with the Linux Kernel. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 26 5月, 2017 2 次提交
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git://git.denx.de/u-boot-nds32由 Tom Rini 提交于
Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: NTom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
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- 24 5月, 2017 14 次提交
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由 Udit Agarwal 提交于
This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Santan Kumar 提交于
This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS flag is enabled. In case QIXIS code is not enabled, use default sysclk value as 100MHz per board documentation. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Yogesh Gaur 提交于
Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: NPriyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: NYork Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: NMingkai Hu <mingkai.hu@nxp.com>
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由 York Sun 提交于
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: NYork Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: NMingkai Hu <mingkai.hu@nxp.com>
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由 Suresh Gupta 提交于
LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com>
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