Update the link script to drop this code when not needed. This is only done
for two architectures at present.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add a new Kconfig option for the command line. This is enabled by default,
but when disabled it will remove the command line.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

All command functions should be static. Update the CBFS functions to follow
this rule.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

After power cycle of a K2G EVM dhcp fails due to a auto-negotiation
timeout. This commit increases the timeout to fix the issue.
Signed-off-by: NVitaly Andrianov <vitalya@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Return value of get_mc_boot_status() in case of failure is not necessary
to be -1.

So update the error condition check.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: NYao Yuan <yao.yuan@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NWenbin Song <wenbin.song@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Return i2c mux to the default channel after accessing retimer.
Signed-off-by: NWenbin Song <wenbin.song@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

IR chip is on one of the channels on multiplexed I2C-bus.
Reset to default channel after accessing.
Signed-off-by: NWenbin Song <wenbin.song@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout
environment variable to specify the vga for the console output when
LCD/HDMI is connected to the boards.
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

As phy_connect and phy_config are being called from DPAA2 driver.
Remove calling of mentioned function from board file.
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This patch integrate DPAA2 ethernet driver existing PHY framework.

Call phy_connect and phy_config as per available DPMAC id defined
in SerDes Protcol.
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The serdes protocol entries in  Serdes table 1 for protocol
0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45
and 0x47 are updated to reflect the entries in
current Reference Manual.
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Reported-by: NJose Rivera <german.rivera@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

During initial DDR training, false parity errors may be detected.
This patch adds workaround to fix the erratum.
Tested on LS2085QDS and LS2080RDB.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.

for all PCI devices discovered in a system:
  -allocate a LUT (look-up-table) entry in that PCI controller
  -allocate a stream ID for the device
  -program and enable a LUT entry (maps PCI requester id to stream ID)
  -set the msi-map property on the controller reflecting the
   LUT mapping

basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: NStuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The per-PCI controller LUT (Look-Up-Table) is a 32-entry table
that maps PCI requester IDs (bus/dev/fun) to a stream ID.

Add defines for the register offsets.
Signed-off-by: NStuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers.
Signed-off-by: NStuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Update comments around how stream IDs are partitioned.
Stream IDs allocated to PCI are no longer divided up by
controller, but are instead a contiguous range
Signed-off-by: NStuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: NStuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

A white space is missing in multiple-line string for bootargs.
Signed-off-by: NYork Sun <york.sun@nxp.com>

As the compatible property values for QSPI and DSPI dts nodes
are changed in kernel, FSL_QSPI_COMPAT and FSL_DSPI_COMPAT
need to be updated too.
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Structures are defined for PDB (Protocol Data Blcks) for various
operations. These structure will be used to add PDB data while
creating the PDB descriptors.
Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Construct APIs are added to create Protocol Descriptors for
CAAM block.
Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

When CAAM runs a descriptor and an error occurs, a non-zero
value is set in Output Status Register. The if condition should
check the status for a non-zero value.
Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Enable wuo config to accelerate coherent ordered writes for LS2080A
and LS2085A.

WRIOP IP is connected to RNI-20 Node.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

With commit 7985cdf7 we converted all systems except for the Layerscape
SoCs to the generic descriptor table based page table setup.

On the Layerscape SoCs however, we just provide an empty table stub
and do the setup ourselves. To reserve enough memory for the tables,
we need to override the default counting mechanism which would end up
with an empty table because we have no maps.

Fixes: 7985cdf7Reported-by: NYork Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: NAlexander Graf <agraf@suse.de>
Tested-by: NYork Sun <york.sun@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Use optimised bus timing for FPGA access.
Signed-off-by: NReinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>

Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>

Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

This patch makes the following changes to the SR1500 board port:

- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system
  bootup.
- Change environment location, so that its not between SPL and
  main U-Boot. This way the combined SPL / U-Boot image can
  be used for updates.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>

This patch makes it possible that boards can define a board-specific env
size. This is used by the SR1500 SoCFPGA board port.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Marek Vasut <marex@denx.de>

Move the inclusion of the common socfpga configuration file further
down in the sr1500 configuration, so that the socfpga_common.h can
check if environment is in SPI NOR and it's location is defined and
if it is not, define default location.

This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI"
which introduced a minor warning.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>

Enabling the support of storing U-Boot environment
within serial NOR flash. By default, its still
store into SDMMC
Signed-off-by: NChin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>

usb: xhci: Fix vendor command error if the request type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.

Add test into xhci_submit_control_message for usb requesttype in USB
vendor request being of standardized type. This fixes detection of
certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized
requesttype in USB vendor request will be ignored.
Signed-off-by: NTed Chen <tedchen@realtek.com>
Tested-by: NAnand Moon <linux.amoon@gmail.com>

This patch changes the USB port scanning procedure and timeout
handling in the following ways:

a)
The power-on delay in usb_hub_power_on() is now reduced to a value of
max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait
using mdelay, instead usb_hub_power_on() will wait before querying
the device in the scanning loop later. The total timeout for this
hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated
and will be used in the following per-port scanning loop as the timeout
to detect active USB devices on this hub.

b)
Don't delay the minimum delay (for power to stabilize) in
usb_hub_power_on(). Instead skip querying these devices in the scannig
loop until the delay time is reached.

c)
The ports are now scanned in a quasi parallel way. The current code did
wait for each (unconnected) port to reach its timeout and only then
continue with the next port. This patch now changes this to scan all
ports of all USB hubs quasi simultaneously. For this, all ports are added
to a scanning list. This list is scanned until all ports are ready
by either a) reaching the connection timeout (calculated earlier), or
by b) detecting a USB device. This results in a faster USB scan time as
the recursive scanning of USB hubs connected to the hub that's currently
being scanned will start earlier.

One small functional change to the original code is, that ports with
overcurrent detection will now get rescanned multiple times
(PORT_OVERCURRENT_MAX_SCAN_COUNT).

Without this patch:
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found

time: 20.163 seconds

With this patch:
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found

time: 1.822 seconds

So ~18.3 seconds of USB scanning time reduction.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Tested-by: NStephen Warren <swarren@nvidia.com>

Debugging has shown, that all USB hubs are being reset twice while
USB scanning. This introduces additional delays and makes USB scanning
even more slow. Testing has shown that this 2nd USB hub reset doesn't
seem to be necessary.

This patch now removes this 2nd USB hub reset. Resulting in faster USB
scan time. Here the current numbers:

Without this patch:
=> time usb start
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found

time: 24.003 seconds

With this patch:
=> time usb start
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found

time: 20.392 seconds

So ~3.6 seconds of USB scanning time reduction.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>