At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.

Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.

Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.

This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

These functions are CPU-related and do not use driver model. Move them to
cpu_func.h
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

It's quite hard to figure out time units for various function that have
timeout parameters. This leads to possible errors when one forgets to
convert ms to us, for example. Let's rename those parameters
correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues
further.

While at it, add time units info as comments to struct mmc fields.

This commit doesn't change the behavior, only renames parameters names.
Buildman should report no changes at all.
Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NIgor Opaniuk <igor.opaniuk@gmail.com>

This function can also be used for eMMC devices.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

This is not required. The MMC core sends CMD0 right after the
initialization and it serves the same purpose.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

It sometimes happen that the PSTATE register does not indicate that the
bus is ready when it really is. This usually happens after a mode switch.
In that case it makes sense to reset the FSM handling the CMD and DATA

Also reset the FSMs if the STATE register cannot be cleared. This also
sometimes happens after a mode switch.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

Pbias voltage should match the IO voltage set for the SD card. With the
latest pbias change to 3.3V, update the capabilities and IO voltages
settings to 3.3V.
Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>

Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while enabling io regulators. This way the driver doesn't see an error
when disabling an always-on regulator and when enabling is not supported.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Errata i929 in certain OMAP5/DRA7XX/AM57XX silicon revisions
(SPRZ426D - November 2014 - Revised February 2018 [1]) mentions
unexpected tuning pattern errors. A small failure band may be present
in the tuning range which may be missed by the current algorithm.
Furthermore, the failure bands vary with temperature leading to
different optimum tuning values for different temperatures.

As suggested in the related Application Report (SPRACA9B - October 2017
- Revised July 2018 [2]), tuning should be done in two stages.
In stage 1, assign the optimum ratio in the maximum pass window for the
current temperature. In stage 2, if the chosen value is close to the
small failure band, move away from it in the appropriate direction.

References:
[1] http://www.ti.com/lit/pdf/sprz426
[2] http://www.ti.com/lit/pdf/SPRACA9Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>

When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be
bound before relocation. However due to a bug in the DM core,
the flag only takes effect when devices are statically declared
via U_BOOT_DEVICE(). This bug has been fixed recently by commit
"dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in
lists_bind_fdt()", but with the fix, it has a side effect that
all existing drivers that declared DM_FLAG_PRE_RELOC flag will
be bound before relocation now. This may expose potential boot
failure on some boards due to insufficient memory during the
pre-relocation stage.

To mitigate this potential impact, the following changes are
implemented:

- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver
  only supports configuration from device tree (OF_CONTROL)
- Keep DM_FLAG_PRE_RELOC flag in the driver only if the device
  is statically declared via U_BOOT_DEVICE()
- Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for
  drivers that support both statically declared devices and
  configuration from device tree
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this.  This
patch removes the support for 'invert' from the MMC driver.
Signed-off-by: NAdam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: NTom Rini <trini@konsulko.com>

The MMC card detect pin is connected to gpio127 on omap3_logic.
When setting up the pbias register for MMC, let's also enable
gpio_127 for the card detect.  As part of the package deal,
gpio_126 and gpio_129 are also enabled.
Signed-off-by: NAdam Ford <aford173@gmail.com>

The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled.  In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef
Signed-off-by: NAdam Ford <aford173@gmail.com>

mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This reduces the size of the binary by about 196 bytes.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>
Tested-by: NRobert Nelson <robertcnelson@gmail.com>
Reviewed-by: NSam Protsenko <semen.protsenko@linaro.org>

I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

This callback is used to send the 74 clock cycles after power up.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>

omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This reverts commit 46831c1a.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: NFelix Brack <fb@ltec.ch>

At present if U-Boot proper uses driver model for MMC, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
default these follow their non-SPL versions, but this can be changed by
boards which need it.
Signed-off-by: NSimon Glass <sjg@chromium.org>