Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: NMike Frysinger <vapier@gentoo.org>

* 'master' of git://git.denx.de/u-boot-nand-flash:
  cmd_nand.c: Fix 'nand dump' after latest MTD resync
  mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_command
  mtd/nand: Fix IFC driver to support 2K NAND page
  nand: reinstate lazy bad block scanning
  Revert "nand: make 1-bit software ECC configurable"

* 'master' of git://git.denx.de/u-boot-nds32:
  nds32/board.c: add PCI prompt at boot up
  nds32/ag101/watchdog.S: add linkage support
  nds32: add linkage support

Fix build error for ethernut5 board due to prototype change
for function board_mmc_getcd().
ethernut5.c:238: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd'
was here
make[2]: *** [ethernut5.o] Error 1
Signed-off-by: NPrabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: egnite GmbH <info@egnite.de>

With 2a8e0fc8 nand_do_read_ops changed in behavior slightly (keeping in sync
with the kernel which did this change in b64d39d8) such that the OOB data is
always copied into oobbuf and never appended to datbuf.  Within U-Boot only
the nand_dump function (for the dump nand subcommand) was expecting the OOB
data to only be appended to datbuf.  So we now change nand_dump to not
malloc extra space, correct the comment about datbuf and OOB data and switch
the pointer to oobbuf before printing.

Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: NTom Rini <trini@ti.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in
fsl_ifc_run_command() during ECC status verification. Also this sector is passed
to is_blank() for blank checking. It is wrong at first place because
is_blank()'s implementation checks for Page size and OOB area size.
is_blank() should be called per page for main and OOB area verification.

Variables name are redefined to avoid confusion between buffer and ecc sector.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.

2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

commit 2a8e0fc8 ("nand: Merge changes
from Linux nand driver") accidentally reverted commit
13f0fd94 ("NAND: Scan bad blocks
lazily.").

Reinstate the change, as amended by commit
ff49ea89 ("NAND: Mark the BBT as scanned
prior to calling scan_bbt.").
Signed-off-by: NScott Wood <scottwood@freescale.com>

This reverts commit 4fee6c2f.

It breaks boards that currently rely on soft-ecc, as pointed out here:
http://patchwork.ozlabs.org/patch/140872/

The reverted patch should be resubmitted with documentation, and with the
CONFIG_MTD_ECC_SOFT selected from every board that needs it.  We could
start by looking at what NAND driver the board selects, and whether
that driver ever asks for soft ECC.
Signed-off-by: NScott Wood <scottwood@freescale.com>

add PCI prompt at boot up for probing PCI device
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>

Add linkage support to watchdog.S.
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>

Add linkage support.
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>

Mainline kernel for OMAP3 doesn't enable L2 cache
It expects L2$ to be enabled by ROM-code/bootloader.

Leaving L2$ enabled can be troublesome in cases where
the L2 cache is not under CP15 control, such as in
Cortex-A9. This problem is explained in detail in
the commit dc7100f4

However, this problem doesn't apply to Cortex-A8
because L2$ in Cortex-A8 is under CP15 control and
hence the generic armv7 maintenance opertions work
for it.

As such we can make an exception for OMAP3 and
leave the L2$ enabled when we jump to kernel. This
is done by removing the strongly-linked implementation
of v7_outer_cache_disable() and allowing it to fall
back to the weakly linked implementation that doesn't
do anything.
Signed-off-by: NAneesh V <aneesh@ti.com>

Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>

Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>

Add PREBOOT, SILENT_CONSOLE and DEVICE_NULLDEV for release
build. Fixed bug in CONFIG_SYS_HUSH_PARSER define.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>

The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>

size of environment must match erasable block size in the flash.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>

Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.

There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.

setenv disable_giga 1
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>

Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>

Add the gigabit phy KSZ9021.
Also, add function ksz9021_phy_extended_write
/_read for access to the phys extended registers.
The environment variable "disable_giga"
can be used to disable 1000baseTx.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>

Surround non PHYLIB routines miiphy_restart_aneg
and miiphy_wait_aneg with ifndef CONFIG_PHYLIB.
When later PHYLIB is required it is easy to delete
the non-PHYLIB code. This separation idea
came from Andy Fleming.

fec_miiphy_read, and fec_miiphy_write changed to
fec_phy_read, and fec_phy_write with argument changes.

Deprecated miiphy_register is no longer used. Both
old and new PHYLIB code now use mdio_register.

Cleanup some debug prints.

Inline function fec_miiphy_fec_to_eth is no longer necessary.
Moved to the single call location.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>

The Integrator/CP config file was very outdated and gives a
non functional U-Boot. So:

- Set the CONFIG_ARCH_CINTEGRATOR arch flag correctly
- Add proper core module configuration options
- Skip cluttered command lista and just include
  <config_cmd_default.h>
- Kill off #if 0 network section and insert some example
  configuration that simply just boots from the network
  using TFTP if available.
- Delete flash control registers that have no business
  in this config file. These are already moved down to
  board/armltd/integrator/integrator-sc.h

Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The PCI support for the Integrator AP has apparently never
been finished and I strongly suspect that it has never worked,
so let's fix it. This is a list of the more or less
un-splittable changes done in this driver rewrite:

- Replace the register definitions stashed into the config
  file (!) with a copy if the register file from the Linux
  kernels arch/arm/include/asm/hardware/pci_v3.h

- Delete the unreadable gigantic macros that perform the
  config accesses and replace them with copyedited code from
  Linux arch/arm/mach-integrator/pci_v3.c

- Rewrite the rest of the setup code to use the
  v3_[read|write][lwb]() accessors.

- Enable PCI by default in the AP board configuration.

- Fix checkpatch warnings and make code more conformant.
Tested-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The U-Boot startup infrastructure already makes sure pci_init() is
called at a proper time, calling it again from within the board
setup code will not make things better.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NDetlev Zundel <dzu@denx.de>
CC: Stefano Babic <sbabic@denx.de>

In commit 2d575e46 a separate header
file was introduced for the DM6467T EVM, include/configs/davinci_dm6467Tevm.h.
The substantial difference between the davinci_dm6467evm and the
davinci_dm6467Tevm configuration is a single bit in the hardware revision
that is passed to the Linux kernel and davinci_dm6467evm has
REFCLK_FREQ = 27000000 where as davinci_dm6467Tevm.h has a
REFCLK_FREQ = 33000000.

This patch removes include/configs/davinci_dm6467Tevm.h. Instead the
include/configs/davinci_dm6467evm.h configuration is used for DM6467T EVMs and
renamed CFG_REFCLK_FREQ to CONFIG_REFCLK_FREQ and CONFIG_REFCLK_FREQ is defined
in boards.cfg.
Signed-off-by: NPrabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Tom Rini <trini@ti.com>

Signed-off-by: NThomas Weber <weber@corscience.de>

Because the tricorder uses the CONFIG_OMAP_HSMMC the
initialization command is mmc rescan and not mmc init.
Signed-off-by: NThomas Weber <weber@corscience.de>
Signed-off-by: NTom Rini <trini@ti.com>

Cc: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: NTom Rini <trini@ti.com>
Acked-by: Dirk Behme<dirk.behme@gmail.com>

Signed-off-by: NTom Rini <trini@ti.com>

* For cold silicon the DDR timings need to be relaxed in order for
  the device to boot with DDR at 266MHz
* Fix proposed by James Doublesin
Signed-off-by: NChase Maupin <Chase.Maupin@ti.com>

add support to read mac address for AM18x EVM manufactured from
Spectrum digital which have mac address stored in I2C EEPROM manufactured
by WINBOND. This patch reads mac address from I2C EEPROM and sets the
environment variable if not set, If mac address is already present in
environment compare it with the mac address in EEPROM and warn on
mismatch.Introduced a config option CONFIG_MAC_ADDR_IN_EEPROM to where
to look for the mac address.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>

add support to read mac address for da850/L138 evm manufactured by
Logic PD which store mac address in SPI flash manufactured by ST
Microelectronics. This patch adds support to read mac address from
SPI flash and set the mac address if it hasn't been set in environment,
If it has been set in the environment it compares the value one with
SPI flash and warns on mismatch. Introduced a config option
CONFIG_MAC_ADDR_IN_SPIFLASH indicating where to look mac address for.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>

this patch addresses the issue that there is no DVI output on beagleboard-xm in
u-boot; the TFP410 is not powered on, DVI_PUP needs to be set high

this is done differently on beagleboard-xm rev. B/C versus earlier boards:
beagleboard-xm B/C need to set GPIO2 of the TWL4030
earlier boards need to set GPIO170

note that the change occured somewhere inbetween beagleboard-xm rev. A2 and A3

note that beagleboard-xm rev. A and rev. B cannot be distinguished using
get_board_revision(), REVISION_XM_A/REVISION_XM_B is bogus

due to this glitch, the patch cannot work correctly on some beagleboard-xm
rev A/B boards

tested on beagleboard-xm rev. C (you should see orange color on a monitor)

note that the framebuffer is NOT yet set up, this could be done along the
lines below (for 800x480 resolution and RGB24) before calling omap3_dss_enable()

static void configure_frame_buffer() {
	writel(0x80500000, (uint *) 0x48050480); // address
	writel(0x80500000, (uint *) 0x48050484);
	writel(0x01df031f, (uint *) 0x4805048c); // size
	writel(0x00000091, (uint *) 0x480504a0); // RGB24
}
Signed-off-by: NPeter Meerwald <p.meerwald@bct-electronic.com>

check for the return status for eth_getenv_enetaddr_by_index()
and eth_setenv_enetaddr() functions and print appropriate message
on failure.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: NMike Frysinger <vapier@gentoo.org>

The commit message of a28afca5 (Add uboot "fdt_high" enviroment variable)
states that fdt_high behaves similarly to the existing initrd_high.
But fdt_high actually has an outstanding difference from initrd_high.
The former specifies the start address, while the later specifies the
end address.

As fdt_high and initrd_high will likely be used together, it'd be nice
to have them behave same.  The patch changes the behavior of fdt_high
to have it aligned with initrd_high.

The document of fdt_high in README is updated with an example to
demonstrate the usage of this environment variable.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSimon Glass <sjg@chromium.org>

MX35PDK board does not need to print CPU revision and reset cause in board file
because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

get_reset_cause() function is only used inside print_cpuinfo(), so let it be
defined only when CONFIG_DISPLAY_CPUINFO is selected.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>