This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board
Kconfig files matching what was present in their config headers. This
will make it cleaner to conditionalise the value for Malta based on 32
vs 64 bit builds.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

The address of the UART differs based upon the system controller because
it's actually within the I/O port region, which is in a different
location for each system controller. Rather than handling this as 2
UARTs with the correct one selected at runtime, use I/O port accessors
for the UART such that access to it gets translated into the I/O port
region automatically.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Recently a set of CONFIG_CMD_FOO defines was moved from being defined
in config_distro_defaults to Kconfig, and added to all sunxi defconfigs
to compensate.

Instead of explictly selecting these in all sunxi defconfigs,
simply always select these for sunxi boards. This makes the defconfigs
simpler and ensures a consistent set of available commands across all
sunxi boards.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The ARM Trusted Firmware (ATF) code now lives in SRAM on the Pine64/A64,
so we can claim the whole of DRAM for OS use.

This reverts commit 3ffe39ed.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The A80 uses the AXP809 as its primary PMIC.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The AXP818 has a switchable output, SW. This is commonly used for
controlling power to the LCD backlight.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The newer chips use a newer display pipeline, which is not supported.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

A83T, H3, and A64 have a dedicated pin for card detect on the PF
pingroup. This is used in all designs. Set it as the default.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

In most other places, we sort SoC descriptions by family (sunXi) first,
then by the chip name (A20).
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The user should always select an SoC variant to support. Not choosing
one doesn't make sense for a bootloader.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Disable the non-existent ethernet ports on T4240RDB:FM1_DTSEC5,
FM1_DTSEC6, FM2_DTSEC5 and FM2_DTSEC6.
Signed-off-by: NYing Zhang <ying.zhang22455@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Extending Kconfig for adding new platform is a lot of work
for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and
remove all dependencies on TARGET_ZYNQ_* options including SPL.
As a side-effect it also remove custom init folder for ps7_init_gpl.*
files. Folder is chosen based on device-tree file.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Support RAM and MMC boot mode in SPL also with SPL_FIT images.

In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
 aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
 mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
 -d bl31.bin atf.ub
 cp spl/boot.bin <sdcard fat partition>
 cp atf.ub <sdcard fat partition>
 cp u-boot.bin <sdcard fat partition>

2) Boot flow with full U-Boot(EL3):
 cp spl/boot.bin <sdcard>
 cp u-boot*.img <sdcard>

3) emmc boot mode
 dd if=/dev/zero of=sd.img bs=1024 count=1024
 parted sd.img mktable msdos
 parted sd.img mkpart p fat32 0% 100%
 kpartx -a sd.img
 mkfs.vfat /dev/mapper/loop0p1
 mount /dev/mapper/loop0p1 /mnt/
 cp spl/boot.bin /mnt
 cp u-boot.img /mnt
 cp u-boot.bin /mnt
 cp atf.ub /mnt
 umount /dev/mapper/loop0p1
 kpartx -d sd.img
 cp sd.img /tftpboot/

 and program it via u-boot
 tftpb 10000 sd.img
 mmcinfo
 mmc write 10000 0 $filesize
 mmc rescan
 mmc part
 ls mmc 0

psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.

The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for on board eeprom with programmed MAC for using in u-boot
to have uniq address for every board.
Most of the time uniq MAC address is on a label on the board.
If address is not programmed use these command to program it.

On zcu102:
ZynqMP> mm.b 0
00000000: 00 ? 00
00000001: a0 ? 0a
00000002: 35 ? 35
00000003: 02 ? 02
00000004: 00 ? ef
00000005: 00 ? 67
00000006: 00 ? q
i2c dev 5
i2c write 0 54 20 6
i2c md 54 20
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>

Fix the missing pin config of the SDMMC0 interface.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>

The board supports following features:
 - Boot media support: NAND Flash/SPI Flash
 - Support ethernet
 - Support USB mass storage
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>

Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Tested-by: NStefan Roese <sr@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Tested-by: NStefan Roese <sr@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

We always build for a mips32 or higher ISA, so this ".set mips32"
directive is redundant. Once MIPSr6 support is added it will become
harmful since some instruction encodings change & this directive will
cause the older encodings to be incorrectly emitted instead of the
appropriate ones for the build.

In preparation for supporting MIPSr6, remove this redundant directive.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>

This patch add board-level code and base DT for AP143.
Signed-off-by: NWills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch add board-level code and base DT for AP121.
Signed-off-by: NWills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Add layout definitions and implement functions for field printing/updating,
layout detection, layout assignment, and layout parsing.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>

Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>

To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity
by setting relative bit in SCFG_INTPCR register, because AQR105
interrupt is low active but GIC accepts high active.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.
Signed-off-by: NAlex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Using u16 for cfg_rcw_src and u8 for sd1refclk_sel is enough.
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

gd->env_addr will be initialized in env_init() in
common/env_nowhere.c if CONFIG_ENV_IS_NOWHERE is defined.
So no need to do it again.
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The current 'cpld reset' will just write global_rst register
but couldn't switch to NOR boot if the board's switches are
for NAND/SD boot. So need to write rcw source registers for
NOR boot as well.
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Mix usage of uint32_t and u32 fixed in favor of u32.
Signed-off-by: NVincent Siles <vincent.siles@provenrun.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

On the LS102x boards, in order to initialize the ICID values of
masters, the dev_stream_id array holds absolute offsets from the
base of SCFG.

In ls102xa_config_ssmu_stream_id, the base pointer is cast to
uint32_t * before adding the offset, leading to an invalid address.
Casting it to void * solves the issue.
Signed-off-by: NVincent Siles <vincent.siles@provenrun.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Update MAINTAINERS file for ls2080aqds and ls2080ardb platforms.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Optimize DDR timing for good margins to support new Transcend
and Apacer DDR4 UDIMM besides current Micron UDIMM.

Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with
following UDIMM on LS2080ARDB.
 - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z
 - Apacer UDIMM: 78.C1GM4.AF10B
 - Transcend UDIMM: TS1GLH72V1H
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This function is implemented by the legacy block functions now. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This option currently enables both the command and the SCSI functionality.
Rename the existing option to CONFIG_SCSI since most of the code relates
to the feature.
Signed-off-by: NSimon Glass <sjg@chromium.org>