Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a
quick enumberation of the PCI devices, but don't need any setup work done.
This is very beneficial on platforms that have u-boot loaded by another
boot loader which does a more sophisticated job of setup of PCI devices
than u-boot.  That way, u-boot can just read what's there and get on
with life.  This is what SeaBIOS does.
Signed-off-by: NAndrew Sharp <andywyse6@gmail.com>

All usage of config_cmd_default.h uses <> for the include statement.
Update the README to do the same, rather than using "".
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>

NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a board specific config file.
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>

This can be useful for generic scripts. For example, rather than hard-
coding a script to ext2load tegra-harmony.dtb, it could load
${soc}-${board}.dtb and hence not need adjustments to run on multiple
boards.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This describes requirement of e500 and e500v2 processor to support external
debugger.

It also provide an insight of the configuration switch required and their
description.
Signed-off-by: NRadu Lazarescu <radu.lazarescu@freescale.com>
Signed-off-by: NMarius Grigoras <marius.grigoras@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>

Code based on networking/zcip.c in busybox
commit 8531d76a15890c2c535908ce888b2e2aed35b172
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

This is useful if you want to look for a DHCP server, but try some
other settings if not available.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD
Signed-off-by: NAneesh V <aneesh@ti.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>

When boot from SRIO, slave's ENV can be stored in master's memory space,
then slave can fetch the ENV through SRIO interface.

NOTE: Because the slave can not erase, write master's NOR flash by SRIO
	  interface, so it can not modify the ENV parameters stored in
	  master's NOR flash using "saveenv" or other commands.

Master needs to:
	1. Put the slave's ENV into it's own memory space.
	2. Set an inbound SRIO window covered slave's ENV stored in master's
	   memory space.
Slave needs to:
	1. Set a specific TLB entry in order to fetch ucode and ENV from master.
	2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com>

For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image in master NOR flash.
	3. Normally boot from local NOR flash.
	4. Configure SRIO switch system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to SRIO1 or SRIO2 by RCW.
	3. RCW should configure the SerDes, SRIO interfaces correctly.
	4. Slave must be powered on after master's boot.
	5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
	   locally.

For the slave module, need to finish these processes:
	1. Set the boot location to SRIO1 or SRIO2 by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
	4. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIOBOOT_SLAVE_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com>

Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: vapier@gentoo.org
Acked-by: NAnatolij Gustschin <agust@denx.de>

Signed-off-by: NMichael Jones <michael.jones@matrix-vision.de>

Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through
endianess options to LD.

Build tested with:
 - ELDK 4 mips_4KC- and mips4KCle
 - Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@googlemail.com>

This patch allows loading RAW ramdisk via bootz command. The raw ramdisk is
loaded only in case it's size is specified:

  bootz <kernel addr> <ramdisk addr>:<ramdisk size> <fdt addr>

For example:

  bootz 0x42000000 0x43000000:0x12345 0x44000000
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: albert.u.boot@aribaud.net
Cc: afleming@gmail.com
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

This command boots Linux zImage from where the zImage is loaded to. Passing
initrd and fdt is supported.

Tested on i.MX28 based DENX M28EVK
Tested on PXA270 based Voipac PXA270.

NOTE: This currently only supports ARM, but other architectures can be easily
added by defining bootz_setup().
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: albert.u.boot@aribaud.net
Cc: afleming@gmail.com,
Cc: Simon Glass <sjg@chromium.org>,
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning
field in the EHCI controller on reset.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NRemy Bohmer <linux@bohmer.net>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This patch adds the support for high speed in usb device framework and usbtty
driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board
configuration files have to define this macro to enable high speed support.

Along with that specific peripheral drivers also need to define a function to
let the framework know that the enumeration has happened at high speed.
This function prototype is "int is_usbd_high_speed(void)"
Signed-off-by: NVipin Kumar <vipin.kumar@st.com>
Signed-off-by: NAmit Virdi <amit.virdi@st.com>

Signed-off-by: NTom Rini <trini@ti.com>

Once CONFIG_FAT_WRITE is defined, users can invoke 'fatwrite' command
that saves data in RAM as a FAT file.

This patch was originally part of

http://article.gmane.org/gmane.comp.boot-loaders.u-boot/121847Signed-off-by: NDonggeun Kim <dg77.kim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMaximilian Schwerin <mvs@tigris.de>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

This reverts commit 295d3942.

It turns that this really doesn't work very nicely. Instead we should
have a pre-console panic function so that we know that further execution
is impossible and we don't need to worry about trampling on UARTs, etc.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NWolfgang Denk <wd@denx.de>

This defines the basics of a new boot time measurement feature. This allows
logging of very accurate time measurements as the boot proceeds, by using
an available microsecond counter.

To enable the feature, define CONFIG_BOOTSTAGE in your board config file.
Also available is CONFIG_BOOTSTAGE_REPORT which will cause a report to be
printed just before handing off to the OS.

Most IDs are not named at this stage. For that I would first like to
renumber them all.

Timer summary in microseconds:
       Mark    Elapsed  Stage
          0          0  reset
    205,000    205,000  board_init_f
  6,053,000  5,848,000  bootm_start
  6,053,000          0  id=1
  6,058,000      5,000  id=101
  6,058,000          0  id=100
  6,061,000      3,000  id=103
  6,064,000      3,000  id=104
  6,093,000     29,000  id=107
  6,093,000          0  id=106
  6,093,000          0  id=105
  6,093,000          0  id=108
  7,089,000    996,000  id=7
  7,089,000          0  id=15
  7,089,000          0  id=8
  7,097,000      8,000  start_kernel
Signed-off-by: NSimon Glass <sjg@chromium.org>

The commit message of a28afca5 (Add uboot "fdt_high" enviroment variable)
states that fdt_high behaves similarly to the existing initrd_high.
But fdt_high actually has an outstanding difference from initrd_high.
The former specifies the start address, while the later specifies the
end address.

As fdt_high and initrd_high will likely be used together, it'd be nice
to have them behave same.  The patch changes the behavior of fdt_high
to have it aligned with initrd_high.

The document of fdt_high in README is updated with an example to
demonstrate the usage of this environment variable.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSimon Glass <sjg@chromium.org>

Acked-by: NJason Liu <jason.hui@linaro.org>
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The V bit of the c1 register of CP15 should not be cleared on DA850
SoCs since they have no valid memory at 0x00000000. This patch
introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
that allows setting the correct value for the V bit.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Reported-by: NSughosh Ganu <urwithsughosh@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Heiko Schocher <hs@denx.de>

There are tools that automatically extract this information, so better
make it up to date.
Signed-off-by: NWolfgang Denk <wd@denx.de>

This adds ethernet driver for Calxeda xgmac found on Highbank SOC.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Fix: WARNING: __aligned(size) is preferred over
__attribute__((aligned(size)))
Signed-off-by: NWolfgang Denk <wd@denx.de>

From: Sonny Rao <sonnyrao@chromium.org>

These functions are useful in U-Boot because they allow a graceful failure
rather than an unpredictable stack overflow when printf() buffers are
exceeded.

Mostly copied from the Linux kernel. I copied vscnprintf and
scnprintf so we can change printf and vprintf to use the safe
implementation but still return the correct values.

(Simon Glass <sjg@chromium.org> modified this commit a little)
Signed-off-by: NSonny Rao <sonnyrao@chromium.org>

Add documentation for CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
configuration options.
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>

This patch adds support for console output before the console is inited.
The main purpose of this is to deal with a very early panic() which would
otherwise cause a silent hang.

A new board_pre_console_putc() function is added to the board API. If
provided by the board it will be called in the event of console output
before the console is ready. This function should turn on all UARTs and
spray the character out if it possibly can.

The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NGraeme Russ <graeme.russ@gmail.com>

The BAB7xx boards are almost deceased.  They cause build warnings, an
it's not worth the effort to fix these.  Remove the dead body.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>

TPM (Trusted Platform Module) is an integrated circuit and
software platform that provides computer manufacturers with the
core components of a subsystem used to assure authenticity,
integrity and confidentiality.

This driver supports version 1.2 of the TCG (Trusted Computing
Group) specifications.

The TCG specification defines several so called localities in a
TPM chip, to be controlled by different software layers. When
used on a typical x86 platform during the firmware phase, only
locality 0 can be accessed by the CPU, so this driver even while
supporting the locality concept presumes that only locality zero
is used.

This implementation is loosely based on the article "Writing a
TPM Device Driver" published on http://ptgmedia.pearsoncmg.com

Compiling this driver with DEBUG defined will generate trace of
all accesses to TMP registers.

This driver has been tested and is being used in three different
functional ChromeOS machines (Pinetrail and Sandy Bridge Intel
chipsets) all using the same Infineon SLB 9635 TT 1.2 device.

A u-boot cli command allowing access to the TPM was also
implemented and is being submitted as a second patch.

Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73
Signed-off-by: NVadim Bendebury <vbendeb@chromium.org>
CC: Wolfgang Denk <wd@denx.de>

Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman.  Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both.  A given SOC will only have
a QE or an Fman, so this is safe.

Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND.  There's no way to know by looking at a variable how it's supposed
to be used.

In the future, the code which uploads QE firmware and Fman firmware will
be merged.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

since commits:
davinci: emac: add support for more than 1 PHYs
062fe7d3

davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
fb1d6332

I get following warning on the enbw_cmc board:

Err:   serial
Net:    5 ETH PHY detected
miiphy_register: non unique device name 'KSZ8873 @ 0x01'
DaVinci-EMAC
Hit any key to stop autoboot:  0

Also I see some debug printfs:

=> run load
+ emac_close
+ emac_ch_teardown
- emac_ch_teardown
+ emac_ch_teardown
- emac_ch_teardown
- emac_close
+ emac_open
- emac_open
Using DaVinci-EMAC device

reason is 062fe7d3 new define MAX_PHY.
This is set to 3! I get on this board 5 active phys, so
this leads in wrong memory writes ...

so I changed:

- define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT to set
  the MAX_PHY value, add a description in README
  for the new CONFIG_SYS option.
- print an error message if more then MAX_PHYs are
  detected.
- fill the active_phy_addr array in a for loop with
  0xff
- changed printf() in debug_emac()
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Tom Rini <tom.rini@gmail.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

CONFIG_MXC_SPI currently works on MX31/35/51 boards, so update the README file.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

similiar to commit dc7cd8e5, only
adapted for the new spl framework.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Acked-by: NTom Rini <trini@ti.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Rename mc13783-rtc so that it can be used for both MC13783 and MC13892 PMICs.

efikamx board, for example, does use a MC13892 PMIC, but the RTC selection is currently made as:

#define CONFIG_RTC_MC13783

,which is not very obvious.

Let the MC13783 and MC13892 RTC be selected by:

#define CONFIG_RTC_MC13XXX
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

As a part of the manufacturing process for some of our custom hardware,
we are programming the EEPROMs attached to our Intel 82571EB controllers
from software using U-Boot and Linux.

This code provides several conditionally-compiled features to assist in
our manufacturing process:

  CONFIG_CMD_E1000:
    This is a basic "e1000" command which allows querying the controller
    and (if other config options are set) performing EEPROM programming.
    In particular, with CONFIG_E1000_SPI this allows you to display a
    hex-dump of the EEPROM, copy to/from main memory, and verify/update
    the software checksum.

  CONFIG_E1000_SPI_GENERIC:
    Build a generic SPI driver providing the standard U-Boot SPI driver
    interface.  This allows commands such as "sspi" to access the bus
    attached to the E1000 controller.  Additionally, some E1000 chipsets
    can support user data in a reserved space in the E1000 EEPROM which
    could be used for U-Boot environment storage.

  CONFIG_E1000_SPI:
    The core SPI access code used by the above interfaces.

For example, the following commands allow you to program the EEPROM from
a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled):
  usb start
  fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin
  e1000 0 spi program $loadaddr 0 1024
  e1000 0 spi checksum update

Please keep in mind that the Intel-provided .eep files are organized as
16-bit words.  When converting them to binary form for programming you
must byteswap each 16-bit word so that it is in little-endian form.

This means that when reading and writing words to the SPI EEPROM, the
bit ordering for each word looks like this on the wire:

  Time >>>
------------------------------------------------------------------
  ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
------------------------------------------------------------------
  (MSB is 15, LSB is 0).
Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Ben Warren <biggerbadderben@gmail.com>

This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT.
Along the way it removes some leftover

 #define BOARD_LATE_INIT		1

and adds some basic documentation for board specific
callbacks in README.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
Acked-by: NStefano Babic <sbabic@denx.de>

Add documentation for CONFIG_GATEWAYIP and CONFIG_NETMASK;
also add information which environment variables are set.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Acked-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NWolfgang Denk <wd@denx.de>