- 11 10月, 2009 3 次提交
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由 Luigi 'Comio' Mantellini 提交于
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Luigi 'Comio' Mantellini 提交于
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Luigi 'Comio' Mantellini 提交于
Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 09 10月, 2009 1 次提交
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由 Wolfgang Denk 提交于
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- 08 10月, 2009 4 次提交
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由 Joakim Tjernlund 提交于
NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
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由 Peter Tyser 提交于
When U-Boot is relocated from flash to RAM pointers are modified accordingly. However, pointers initialzed with NULL values should not be modified so that they maintain their intended NULL value. If the BSS segment is linked at address 0 its address will not be updated as necessary during relocation. This is a temporary workaround. The end goal is to add support to U-Boot to dynamically locate the BSS at an arbitrary address at runtime. When the ability to fixup the BSS inteligently is added, this workaround can be removed and the 85xx link script can put the BSS at a fixed address at link time. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Detlev Zundel 提交于
This fixes the code and the comment according to the original intent of doing an intensive memory test when PSC6_3 is pulled low on the STK52xx. Notably PORT_CONFIG will be overridden with this correct code now, so beware. The original code only worked by coincidence depending on the PORT_CONFIG setting from the header file. The new code was tested to ensure that the (undocumented) memory test still works on the STK52x. Signed-off-by: NDetlev Zundel <dzu@denx.de> CC: Martin Krause <Martin.Krause@tqs.de> Minor white-space cleanup. Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
Commit 054197ba and later fixes used an array to initialize some of the MDDRC parameters; however, the use of an array turned out to be a bad idea as it was not possible to correlate structure entries to array indices in readable and reliable way. Now we use a struct instead, which makes this self-explanatory. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 07 10月, 2009 7 次提交
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由 Niklaus Giger 提交于
After running checkstyle.pl on the three previous patches I noted that in the *.h files there were a lot of long lines. This patch solves this problem. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the relevant HW configuration registers (address, symbolic name, content). This allows to easily detect errors in *.h files and changes in the HW configuration. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
Here you find all the changes in the include directory for new register names and adapting other ones to the names used by AMCC in their manuals, e.g. For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008 For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006 Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older 405EX(r) parts. Here a list: 0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec 0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec Since there are only a few older parts in the field, this patch now changes the PVR's above to represent the new Rev D versions. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Phong Vo" <pvo@amcc.com>
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由 Stefan Roese 提交于
This message is printed upon PCIe bus scan, not only upon error, but also if no PCIe device is detected at all. Since this is not an error, let's remove this message in this case. We already have the message "link is not up." if there is no PCIe device present. Signed-off-by: NStefan Roese <sr@denx.de> Acked-by: NWolfgang Denk <wd@denx.de>
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由 Mike Nuss 提交于
The SPD detection code for the Denali memory controller used on some ppc4xx processors incorrectly encodes DDR0_42. With certain memory configurations, this can cause the bootwrapper to incorrectly calculate the installed memory size, because the number of row bits is wrong. This patch fixes that encoding. Signed-off-by: NMike Nuss <mike@terascala.com> Signed-off-by: NStefan Roese <sr@denx.de>
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- 05 10月, 2009 7 次提交
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由 Ben Warren 提交于
As discussed on mailing list, <0 indicates failure, >=0 indicates number of interfaces found. Also added blurb about private data Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org> Acked-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Prafulla Wadaskar 提交于
if link up detection code is disabled through config option, it gives build warning. This patch fixes the same Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Ben Warren 提交于
All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: NBen Warren <biggerbadderben@gmail.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Prafulla Wadaskar 提交于
following build warning was observed mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules This patch fixes the same Patch tested for rd6281a board build Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 James Clough 提交于
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the UIC. We need to acknowledge the RX-/TX-interrupts in the SDR0_ICINTSTAT reg as well. This problem was introduced with commit d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines] Signed-off-by: NJames Clough <james@rtetc.com> Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Mike Frysinger 提交于
The random_port() is meant to be used by other net code, but without a prototype, we get fun warnings like: dns.c: In function 'DnsSend': dns.c:89: warning: implicit declaration of function 'random_port' Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 04 10月, 2009 2 次提交
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- 03 10月, 2009 14 次提交
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由 Peter Tyser 提交于
Now that proper relocation is supported, the reloc_off field is no longer necessary. Note that the location of the standalone application jump table pointer in the global data structure is affected by this change, breaking execution of standalone applications compiled for previous versions of U-Boot. We therefore increment XF_VERSION to 6 Signed-off-by: NPeter Tyser <ptyser@xes-inc.com> Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Peter Tyser 提交于
These architectures don't need relocation fixups, so reduce their codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS. Also remove the reloc_off field from their global data structures as it is no longer needed. Note that the location of the standalone application jump table pointer in the global data structure is affected by this change, breaking execution of standalone applications compiled for previous versions of U-Boot. We will therefore increment XF_VERSION in the next commit, which also touches this area. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com> Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Peter Tyser 提交于
Add #ifdefs where necessary to not perform relocation fixups. This allows boards/architectures which support relocation to trim a decent chunk of code. Note that this patch doesn't add #ifdefs to architecture-specific code which does not support relocation. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
Certain ppc compilers are known not to generate the .fixup section properly. The .fixup section is necessary to create a relocatable U-Boot image. A basic check for the existence of the .fixup section should hopefully catch the majority of broken compilers which don't support relocation. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Peter Tyser 提交于
The following changes allow U-Boot to fully relocate from flash to RAM: - Remove linker scripts' .fixup sections from the .text section - Add -mrelocatable to PLATFORM_RELFLAGS for all boards - Define CONFIG_RELOC_FIXUP_WORKS for all boards Previously, U-Boot would partially relocate, but statically initialized pointers needed to be manually relocated. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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- 02 10月, 2009 2 次提交
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由 Matthias Fuchs 提交于
This patch adds support to detect the amount of DDR2 SDRAM on PMC440 modules. Detection is done by probing through a list of available and supported hardware configurations from 1GByte down to 256MB. The static TLB entry is replaced by dynamically created entries. Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch merges the ECC handling (ECC parity byte writing) into one file (ecc.c) for all PPC4xx SDRAM controllers except for PPC440EPx/GRx. This exception is because only those PPC's use the completely different Denali SDRAM controller core. Previously we had two routines to generate/write the ECC parity bytes. With this patch we now only have one core function left. Tested on Kilauea (no ECC) and Katmai (with and without ECC). Signed-off-by: NStefan Roese <sr@denx.de> Cc: Felix Radensky <felix@embedded-sol.com> Cc: Grant Erickson <gerickson@nuovations.com> Cc: Pieter Voorthuijsen <pv@prodrive.nl>
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