- 25 1月, 2019 8 次提交
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由 Simon Goldschmidt 提交于
With CONFIG_REGEX enabled, ETHADDR_WILDCARD is set up for up to 10 interfaces (0..9) as the number can only have one digit. On boards with more than 10 interfaces, this leads to the protection and format checks being absent for eth10addr and above. Fix this by changing ETHADDR_WILDCARD from "\\d?" to "\\d*" to allow more than one digit. Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Simon Goldschmidt 提交于
ETHADDR_WILDCARD is defined as the same value in both env_flags.h and env_callback.h As env_callback.h includes env_flags.h, remove the duplicate definition from env_callback.h Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Thomas RIENOESSL 提交于
When dealing with two ethernet ports and having "netretry" set to "once", it could occur that the connection (e.g. an ARP request) failed, hence the status of the netloop was "NETLOOP_FAIL". Due to the setting of "netretry", the network logic would then switch to the other network interface, assigning "ret" with the return value of "net_start_again()". If this call succeeded we would return 0 (i.e. success) to the caller when in reality the network action failed. Signed-off-by: NThomas RIENOESSL <thomas.rienoessl@bachmann.info> Reviewed-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Baruch Siach 提交于
Current code forces all ports on a given Ethernet device to use the same mdio device. In practice different ports might be wired to separate mdio devices. Move the mdio device from the container struct mvpp2 to the per port struct mvpp2_port. Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NStefan Roese <sr@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Baruch Siach 提交于
Current mdio base lookup code relies on a 'reg' property at the upper CP node. There is no 'reg' property there in current DT files of Armada CP110. Use ofnode_get_addr() instead since it provides proper DT address translation. Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NStefan Roese <sr@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Simon Goldschmidt 提交于
Short frames are padded to the minimum allowed size of 60 bytes. However, the designware driver sends old data in these padding bytes. It is common practice to zero out these padding bytes ro prevent leaking memory contents to other hosts. Fix the padding code to zero out the padded bytes at the end. Tested on socfpga gen5. Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Simon Goldschmidt 提交于
The designware driver has a bug in setting the tx length into the dma descriptor: it always or's the length into the descriptor without zeroing out the length mask before. This results in occasional packets being transmitted with a length greater than they should be (trailer). Due to the nature of Ethernet allowing such a trailer, most packets seem to be parsed fine by remote hosts, which is probably why this hasn't been noticed. Fix this by correctly clearing the size mask before setting the new length. Tested on socfpga gen5. Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Pankaj Bansal 提交于
The phy devices can be accessed via clause 22 or via clause 45. This information can be deduced when we read phy id. if the phy id is read without giving any MDIO Manageable Device Address (MMD), then it conforms to clause 22. otherwise it conforms to clause 45. Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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- 24 1月, 2019 13 次提交
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git://git.denx.de/u-boot-mips由 Tom Rini 提交于
- MIPS: mscc: ocelot: add ethernet switch and network support - MIPS: mscc: add support for ServalT SoC family - MIPS: mscc: add support for Serval SoC family
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由 Horatiu Vultur 提交于
Add board support and configuration for Jaguar2 SoC family. The detection of the board type is based on the phy ids. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Horatiu Vultur 提交于
Add device tree based on evaluation board pcb106. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
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由 Horatiu Vultur 提交于
Add device tree based on evaluation board pcb105. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
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由 Horatiu Vultur 提交于
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Horatiu Vultur 提交于
The Serval SoC family has 32 pins. Currently there is no support for Serval in Linux kernel. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Horatiu Vultur 提交于
Add board support, configuration and DTS for Servalt SoC family. Currently there is one board in this family. Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
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由 Horatiu Vultur 提交于
As Ocelot, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
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由 Horatiu Vultur 提交于
The Servalt SoC family has 36 pins. Currently there is not support for Servalt pinctrl in Linux kernel. Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
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由 Gregory CLEMENT 提交于
Now that network support is added for the ocelot platform, let's add it in the default configuration. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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由 Gregory CLEMENT 提交于
On some ocelots platform a workaround is needed in order to be able to reset the switch without resetting the DDR. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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由 Gregory CLEMENT 提交于
This patch adds support for the Microsemi Ethernet switch present on Ocelot SoCs. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Gregory CLEMENT 提交于
Import Ethernet related nodes from Linux Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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- 23 1月, 2019 1 次提交
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git://git.denx.de/u-boot-nds32由 Tom Rini 提交于
- Support nds32 prebuilt toolchain. - Fix some compile issues. - Fix dts mmc node compatible string.
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- 22 1月, 2019 8 次提交
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由 Rick Chen 提交于
In the two commits: cf3922dd mmc: ftsdc010_mci: Sync compatible with DT mmc node c14e90e8 riscv: dts: Sync DT with Linux Kernel ftsdc010_mci's compatible has been modified as "andestech,atfsdc010" for RISC-V synchronization. But ae3xx.dts and ag101p.dts which are used for nds32 adp-ae3xx and adp-ag101p platforms did not be modified correctly at that time. It will cause mmc detection failure. Fix it here. Signed-off-by: NRick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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由 Rick Chen 提交于
Add -mcmodel=large can let elf-mculib have the same default behavior just like linux-glibc. And it help to pass U-Boot booting sequence. Signed-off-by: NRick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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由 Rick Chen 提交于
Force it to generate SW fup instruction. It help to avoid bugs when running on no-HW-fpu board, but compile with v3f which support HW fpu instruction. Signed-off-by: NRick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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由 Rick Chen 提交于
-G0 is an old option, not support now, So remove it. It can help to fix compile error when build with nds32 pre-build toolchain. Signed-off-by: NRick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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由 Rick Chen 提交于
Download nds32 prebuild toolchain from github which is base on gcc 8.0.1 version for regression. Signed-off-by: NRick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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git://git.denx.de/u-boot-marvell由 Tom Rini 提交于
- Sync Armada-38x dts with Linux 4.20 from Chris - Misc changes and enhancements to Turris Mox (v4) from Marek - Reserve PSCI area for Armada 8k from Heinrich - New Allied Telesis x530 board (Armada-385) from Chris - Misc minor changes (defconfig etc)
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由 Tom Rini 提交于
Per Heiko the original changes were correct and something is misbehaving on his hardware. This reverts commit 3d5931e5. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 21 1月, 2019 10 次提交
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由 Derald D. Woods 提交于
This commit converts the following items to Kconfig: CONFIG_ATMEL_NAND_HWECC CONFIG_ATMEL_NAND_HW_PMECC CONFIG_PMECC_CAP CONFIG_PMECC_SECTOR_SIZE CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER [PMECC References] https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap [Mailing List Thread] https://lists.denx.de/pipermail/u-boot/2018-December/350666.html Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") [trini: Make the migration be size neutral and possibly not fix the above in all cases] Reported-by: NDaniel Evans <photonthunder@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: NDerald D. Woods <woods.technical@gmail.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Chris Packham 提交于
This is a range of stackable network switches. The SoC is Armada-385 and there are a number of variants with differing network port configurations. The DP variants are intended for a harsher operating environment so they use a different i2c mux and fit industrial-temp parts. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Baruch Siach 提交于
These macros are not used anywhere in the boards code. Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Heinrich Schuchardt 提交于
An NVME drive may be installed on the MACCHIATObin board using the PCIe slot or on the Clearfog Pro using mini a PCI-e slot. With the configuration change it becomes usable. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Heinrich Schuchardt 提交于
The memory area [0x4000000-0x4200000[ is occupied by the PSCI firmware. Any attempt to access it from U-Boot leads to an immediate crash. So let's make the same memory reservation as the vendor device tree. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
This is needed for some scenarios, such as booting large FIT image. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Use get_ram_size to determine if the RAM size on Turris Mox is 512 MiB or 1 GiB. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Add support for reading One-Time Programmable memory via mailbox, which communicates with CZ.NIC's firmware on the Secure Processor (Cortex-M3) of Armada 3720. Display product serial number and additional info, and also set MAC addresses. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Add myself as the maintainer of CZ.NIC's Turris Omnia and Turris Mox projects. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
The Armada 37xx watchdog driver was recently accepted for mainline kernel by watchdog subsystem maintainer, but the driver works a little different than the one in U-Boot. This patch fixes this. In the previous implementation there was a tiny period of time when the watchdog was disabled and the system was vulnerables - this was during pinging, which was done by disabling, setting, and enabling the counter. Now pinging is done without disabling the watchdog. We use 2 counters: Counter 1 is the watchdog counter - on expiry, the system is reset. Counter 0 is used to reset Counter 1 to start counting from the set timeout again. So Counter 1 is set to be reset on Counter 0 expiry event event and pinging is done by forcing an immediate expiry event on Counter 0. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Signed-off-by: NStefan Roese <sr@denx.de>
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