- 07 3月, 2012 6 次提交
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由 Simon Glass 提交于
We should aim for a single point of entry to the commands, whichever parser is used. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This saves about 1KB of code space on ARM with CONFIG_SYS_HUSH_PARSER defined. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Boards can select either the 'built-in' parser or the hush parser. We should not call builtin_run_command() if we are using the hush parser. We use run_command() instead, since it knows how to call the correct parser. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Simon Glass 提交于
This is a more sensible name, so rename it. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Simon Glass 提交于
The current run_command() is only one of the parsing options - the other is hush. We should not call run_command() when the hush parser is being used. So we rename this function to better explain its purpose. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Simon Glass 提交于
It really isn't clear why this is here and there is no comment, so drop it. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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- 05 3月, 2012 3 次提交
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由 Thomas Weber 提交于
Signed-off-by: NThomas Weber <weber@corscience.de>
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由 Linus Walleij 提交于
The reference implementation of the PCI initialization code almost everywhere contain this fragile loop of "a few usecs", and its use of volatile variables to delay a number of bus cycles is indeed uncertain. Reading the manual "Integrator/AP Users Guide", page 5-15 it is clearly stated: "Wait until 230ms after the end of the reset period before accessing V360EPC internal registers. The V360EPC supports the use of a serial configuration PROM and the software must wait for the device to detect the absence of this PROM before accessing any registers. The required delay is a function of the PCI Clock, but at the lower frequency (25MHz) is 230ms". So let's simply wait 230ms per the spec. This solves the compilation error that looked like this: pci.c: In function ‘pci_init_board’: pci.c:286:18: warning: variable ‘j’ set but not used Reported-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Fixing build regressions for the Integrator I get find that a few boards try to work around the missing declaration of pciauto_config_init() by declaring it in the local scope. This does not make sense when the sibling functions are in <pci.h> so move the function to the header, ridding the build error in the Integrator and getting rid of the local declarations here and there. Reported-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 3月, 2012 13 次提交
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由 Simon Glass 提交于
This seems to be unsigned char for no good reason. Tidy this up and remove the casts. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Simon Glass 提交于
There doesn't seem to be any reason for using uchar here, so change it to char. This fixes a warning: pointer targets in passing argument 1 of 'sprintf' differ in signedness Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Wolfgang Grandegger 提交于
Following the corresponding Linux code, this patch relaxes reset timings waiting at least 100ms after power to the ports. There are some reports that it helps make enumeration work better on some high speed devices. Furthermore, the wait is only done once after power has been enabled on all ports. CC: Remy Bohmer <linux@bohmer.net> CC: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: NWolfgang Grandegger <wg@denx.de>
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由 amartin@nvidia.com 提交于
This moves keyboard polling logic from USB HCD drivers into USB keyboard driver. Remove usb_event_poll() as keyboard polling was the only user of this API. With this patch USB keyboard works with EHCI controllers again. Tested on a tegra2 seaboard. Signed-off-by: NAllen Martin <amartin@nvidia.com>
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由 amartin@nvidia.com 提交于
If CONSOLE_MUX is enabled, reevaluate console stdin when USB keyboard device is detected. Signed-off-by: NAllen Martin <amartin@nvidia.com>
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由 Vincent Palatin 提交于
When keys are pressed on the numeric keypad, emit key codes for the numbers, operators, dot and enter. Signed-off-by: NVincent Palatin <vpalatin@chromium.org>
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由 Vincent Palatin 提交于
When doing a "GET_REPORT" request on the keyboard control endpoint, the report ID should 0 (ie report ID not used) rather than 1 as reports are not used in boot mode. Signed-off-by: NVincent Palatin <vpalatin@chromium.org>
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由 Vincent Palatin 提交于
Fix the crash when running several times usb_init() with a USB ethernet device plugged. Signed-off-by: NVincent Palatin <vpalatin@chromium.org> Tested-by: NWolfgang Grandegger <wg@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Remy Bohmer <linux@bohmer.net> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Remy Bohmer <linux@bohmer.net> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Remy Bohmer <linux@bohmer.net> Acked-by: NMike Frysinger <vapier@gentoo.org>
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git://git.denx.de/u-boot-nand-flash由 Wolfgang Denk 提交于
* 'master' of git://git.denx.de/u-boot-nand-flash: cmd_nand.c: Fix 'nand dump' after latest MTD resync mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_command mtd/nand: Fix IFC driver to support 2K NAND page nand: reinstate lazy bad block scanning Revert "nand: make 1-bit software ECC configurable"
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git://git.denx.de/u-boot-nds32由 Wolfgang Denk 提交于
* 'master' of git://git.denx.de/u-boot-nds32: nds32/board.c: add PCI prompt at boot up nds32/ag101/watchdog.S: add linkage support nds32: add linkage support
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- 29 2月, 2012 6 次提交
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Fix build error for ethernut5 board due to prototype change for function board_mmc_getcd(). ethernut5.c:238: error: conflicting types for 'board_mmc_getcd' u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was here make[2]: *** [ethernut5.o] Error 1 Signed-off-by: NPrabhakar Lad <prabhakar.csengg@gmail.com> Cc: Tim Schendekehl <tim.schendekehl@egnite.de> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: egnite GmbH <info@egnite.de>
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由 Tom Rini 提交于
With 2a8e0fc8 nand_do_read_ops changed in behavior slightly (keeping in sync with the kernel which did this change in b64d39d8) such that the OOB data is always copied into oobbuf and never appended to datbuf. Within U-Boot only the nand_dump function (for the dump nand subcommand) was expecting the OOB data to only be appended to datbuf. So we now change nand_dump to not malloc extra space, correct the comment about datbuf and OOB data and switch the pointer to oobbuf before printing. Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: NTom Rini <trini@ti.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Prabhakar Kushwaha 提交于
Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in fsl_ifc_run_command() during ECC status verification. Also this sector is passed to is_blank() for blank checking. It is wrong at first place because is_blank()'s implementation checks for Page size and OOB area size. is_blank() should be called per page for main and OOB area verification. Variables name are redefined to avoid confusion between buffer and ecc sector. Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Prabhakar Kushwaha 提交于
1) OOB area should be updated irrespective of NAND page size. Earlier it was updated only for 512byte NAND page. 2) During OOB update fbcr should be equal to OOB size. Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Scott Wood 提交于
commit 2a8e0fc8 ("nand: Merge changes from Linux nand driver") accidentally reverted commit 13f0fd94 ("NAND: Scan bad blocks lazily."). Reinstate the change, as amended by commit ff49ea89 ("NAND: Mark the BBT as scanned prior to calling scan_bbt."). Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Scott Wood 提交于
This reverts commit 4fee6c2f. It breaks boards that currently rely on soft-ecc, as pointed out here: http://patchwork.ozlabs.org/patch/140872/ The reverted patch should be resubmitted with documentation, and with the CONFIG_MTD_ECC_SOFT selected from every board that needs it. We could start by looking at what NAND driver the board selects, and whether that driver ever asks for soft ECC. Signed-off-by: NScott Wood <scottwood@freescale.com>
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- 28 2月, 2012 12 次提交
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由 Macpaul Lin 提交于
add PCI prompt at boot up for probing PCI device Signed-off-by: NMacpaul Lin <macpaul@andestech.com>
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由 Macpaul Lin 提交于
Add linkage support to watchdog.S. Signed-off-by: NMacpaul Lin <macpaul@andestech.com>
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由 Macpaul Lin 提交于
Add linkage support. Signed-off-by: NMacpaul Lin <macpaul@andestech.com>
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由 Aneesh V 提交于
Mainline kernel for OMAP3 doesn't enable L2 cache It expects L2$ to be enabled by ROM-code/bootloader. Leaving L2$ enabled can be troublesome in cases where the L2 cache is not under CP15 control, such as in Cortex-A9. This problem is explained in detail in the commit dc7100f4 However, this problem doesn't apply to Cortex-A8 because L2$ in Cortex-A8 is under CP15 control and hence the generic armv7 maintenance opertions work for it. As such we can make an exception for OMAP3 and leave the L2$ enabled when we jump to kernel. This is done by removing the strongly-linked implementation of v7_outer_cache_disable() and allowing it to fall back to the weakly linked implementation that doesn't do anything. Signed-off-by: NAneesh V <aneesh@ti.com>
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由 Daniel Gorsulowski 提交于
Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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由 Daniel Gorsulowski 提交于
Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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由 Helmut Raiger 提交于
Add PREBOOT, SILENT_CONSOLE and DEVICE_NULLDEV for release build. Fixed bug in CONFIG_SYS_HUSH_PARSER define. Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
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由 Helmut Raiger 提交于
The video setup for the Epson display is provided. Addtionally some extra info is displayed next to the Linux logo. Make get_cpu_rev() publicly available (added to sys_proto.h). Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
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由 Helmut Raiger 提交于
size of environment must match erasable block size in the flash. Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
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由 Troy Kisky 提交于
Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Acked-by: NDirk Behme <dirk.behme@de.bosch.com>
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由 Troy Kisky 提交于
Boards may have things they want done before or after normal phy config. Letting the boards call drv->config allows them more flexibilty. Boards affected by this change are corenet_ds and mpc8544ds. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Acked-by: NDirk Behme <dirk.behme@de.bosch.com>
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由 Troy Kisky 提交于
Add the gigabit phy KSZ9021. Also, add function ksz9021_phy_extended_write /_read for access to the phys extended registers. The environment variable "disable_giga" can be used to disable 1000baseTx. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Acked-by: NDirk Behme <dirk.behme@de.bosch.com>
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