- 13 6月, 2018 13 次提交
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由 Bin Meng 提交于
At present there are 3 irq router drivers. One is the common one and the other two are chipset specific for queensbay and quark. However these are really the same drivers as the core logic is the same. The two chipset specific drivers configure some registers that are outside the irq router block which should really be part of the chipset initialization. Now we remove these specific drivers and make all x86 boards use the common one. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board, so that SMP can be supported too. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
The 206ax cpu driver does not require pre-relocation flag to work. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
This is not used anywhere. Clean this up. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
At present this 206ax cpu driver is only built when FSP is not used. This updates the Makefile to enable the build for both cases. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
As README.x86 already mentions, there are two SPI flashes mounted on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively. SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores the actual BIOS image which is U-Boot. Building a single image with both ME firmware and U-Boot does not make sense. This also describes the exact flash location where the u-boot.rom should be programmed in the documentation. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
It turns out that like Braswell, Intel FSP for IvyBridge requires SPI controller settings to be locked down, as the U-Boot ICH SPI driver fails with the following message on Cougar Canyon 2 board: "ICH SPI: Opcode 9f not found" Update the SPI node property to indicate this fact. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
The Panther Point chipset connected to Ivybridge has xHC integrated, imply it. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
This fixes the following compiler warning: "warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]" Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually [22:16]. This corrects the comment for it. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Shevchenko 提交于
The commit f9a88a4c1cd0 ("iASL: Enhance the -tc option (create AML hex file in C)") in ACPICA project changed a template of the variable that is used in the generated C-file. Now, instead of hard coded "AmlCode" the "%s_aml_code" is in use, where the prefix is a lowered case base name of the output file. In our case it will be "dsdt" producing a name as "dsdt_aml_code". The quick solution is to call sed which replaces new name by the old one to keep compatibility with old version of iASL. The long term solution would be to modify code to use the new name because it is more scalable. Cc: Robert Moore <robert.moore@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Evan Lloyd <evan.lloyd@arm.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> [bmeng: fixed two sentences in the commit message] Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Christian Gmeiner 提交于
Starting with cpuid level 0x16 (Skylake-based processors) it is possible to get CPU base freq via cpuid. This fixes booting on a skylake based system. Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> [bmeng: fixed wrong indention of labels] Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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- 12 6月, 2018 4 次提交
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由 Dennis Gilmore 提交于
The helios4 is built on the SolidRun Armada 38x SOM. The port os based on the ClearFog board, using information from https://github.com/helios-4/u-boot-marvell as well as dtb input from https://github.com/helios-4/linux-marvellSigned-off-by: NDennis Gilmore <dennis@ausil.us> Signed-off-by: NDennis Gilmore <dgilmore@redhat.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Vinitha V Pillai 提交于
Added the following: 1. defconfig for LS1012AFRWY Secure boot 2. PfE Validation support Signed-off-by: NVinitha V Pillai <vinitha.pillai@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Bhaskar Upadhaya 提交于
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART. Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> [yorks: rebase and fix SPDX tag] [yorks: fix board/freescale/ls1012afrdm/Kconfig] Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 09 6月, 2018 4 次提交
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由 Bhaskar Upadhaya 提交于
PPA firmware and header address may vary depending upon different boards, configure ppa firmware and header address in board specific Kconfig. Signed-off-by: NVinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: NJagdish Gediya <jagdish.gediya@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Jagdish Gediya 提交于
Signed-off-by: NJagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
As per updated hardware documentation for lsch3 based chips like LS2088A, 0.9v support has been added in possible supported SoC volatges Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ran Wang 提交于
Signed-off-by: NRan Wang <ran.wang_1@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 08 6月, 2018 19 次提交
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由 Seung-Woo Kim 提交于
After the commit 9b643e31 ("treewide: replace with error() with pr_err()"), there are some pr_err() with no line break. Add missing line breaks. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com>
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由 Seung-Woo Kim 提交于
After the commit 9b643e31 ("treewide: replace with error() with pr_err()"), there are some pr_err() with no line break. Add missing line breaks. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com> Reviewed-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Seung-Woo Kim 提交于
If building envtools, there is env directory in tools directory. Mafe the get_default_envs.sh script exclude tools/env directory. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com>
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由 Ramon Fried 提交于
Add timestamp to each iotrace record to aid in debugging of IO timing access bugs. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
When dealing with a lot of IO regions, sometimes it makes sense only to trace a specific one. This patch adds support for region limits. If region is not set, the iotrace works the same as it was. If region is set, the iotrace only logs io operation that falls in the defined region. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
Add WARN_ONCE definition to allow single time notification of warnings to the user. Taken from Linux kernel (4.17) with slight changes (Removed __section(.data.once)) Signed-off-by: NRamon Fried <ramon.fried@gmail.com> [trini: Drop the musb and dwc3 compat versions] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
The documentation says this is not implemented, but it is. Update the documentation, and clarify its operation. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Sometimes we have several sections which repeat the same entries (e.g. for a read-only and read-write version of the same section). It is useful to be able to tell these entries apart by name. Add a new 'name-prefix' property for sections, which causes all entries within that section to have a given name prefix. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
It is useful to be able to see a list of regions in each image produced by binman. Add a -m option to output this information in a '.map' file alongside the image file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Fix a few missing comments and tidy up some existing ones. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Provide an easy way to execute a single binman test by specifying it on the command line. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This property is not documented. Add a note to the README. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
It is useful to be able to split an image into multiple sections, each with its own size and position, for cases where a flash device has read-only and read-write portions. Add support for this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present we set the Python path at the start of binman so we can read modules in the 'etype' directory. This is a bit messy since it affects 'import' statements through binman. Adjust the code to set the path locally, just where it is needed. Move the 'entry' module in with the other base modules to help with this. It makes more sense here anyway since it does not implement an entry type. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Entries are now passed a Section object rather than an Image. Rename this property to avoid confusion. Signed-off-by: NSimon Glass <sjg@chromium.org>
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