AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same
(based on kernel DT).

Disable second port as its by default set to ICSS usage on EVM.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Add a new compatible to support AM64 SoC
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Currently driver may end up caching disabled port ID as active
interface. Fix this by bailing out earlier in case port is marked
disabled in the DT.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8)
Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port)
as preparation to allow any one of the 8 ports to be used as ethernet
interface in U-Boot.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Sync BCDMA and PKTDMA support from Kernel for AM64 SoC
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Add AM64 SoC specific channel mapping and endpoint data.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Extend PSIL EP data to include AM64 DMA specific information
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

ICSSG Ethernet driver uses two src threads per port (one per slice).
Similarly CPSW uses one src thread.

Drop PSIL EP static data for other src threads in order to reduce
R5 SPL footprint. This makes AM65x board bootable again.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

With AM64x supporting only K3_NAV_RINGACC_RING_MODE_RING or the exposed
ring mode, all other K3 SoCs have also been moved to this common
baseline. Therefore drop other modes such as
K3_NAV_RINGACC_RING_MODE_MESSAGE (and proxy) to save on SPL footprint.

There is a saving of ~800 bytes with this change for am65x_evm_r5_defconfig.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>

AM64 dual mode rings are modeled as pair of Rings objects which has common
configuration and memory buffer, but separate real-time control register
sets for each direction mem2dev (forward) and dev2mem (reverse).

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Update struct ti_sci_msg_rm_udmap_tx_ch_cfg_req to latest ABI to support
AM64x BCDMA Block copy channels.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Parse MAC addresses from EEPROM and set them in the env. This is needed
to get MAC address for additional ethernet ports on the EVM.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Enable all relevant configs for building multiple dtbs into a single fit
image and load the right dtb for next stage.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable relevant configs for reading eeprom data and updating env
variables.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable all relevant configs for printing CPU info.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable defconfigs for building multiple device trees into a single FIT
image.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable relevant configs that checks for the size of image and stack:
BSS: 4KB
Initial MALLOC: 512KB
Initial Stack: 8K
SPL Image size can be: ~960KB
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Add R5 specific dts for AM64 SK
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NSinthu Raja <sinthu.raja@ti.com>

AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC. It supports the following interfaces:
* 2 GB LPDDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode
* x1 USB 3.0 Type-A port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x2 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin Raspberry Pi compatible GPIO header
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 54-pin header for Programmable Realtime Unit (PRU) IO pins
* Interface for remote automation. Includes:
	* power measurement and reset control
	* boot mode change

Add basic support for AM642 SK.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Add I2C nodes for AM64 and enable pinmux for i2c0 for reading eeprom data.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for I2C.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Chipid will be needed for SoC detection for all stages of U-Boot.
So make it u-boot,dm-spl
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Now that single defconfig can be used for booting AM64 EVM and SK,
default device tree will not work for selecting dtb for kernel.
Update the env to select right dtb based on eeprom.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Current BSS allocation of SPL is as below:
size spl/u-boot-spl
   text	   data	    bss	    dec	    hex	filename
 144572	   5484	   1752	 151808	  25100	spl/u-boot-spl

But 20KB is allocated currently for BSS. Reduce it to 4KB and
save some space for stack.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Avoid R5 SPL stack writing into ROM index table. Re-use the same space
for storing EEPROM data.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable support for selecting DTB within SPL based on EEPROM.
This will help to use single defconfig for both EVM and SK
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Update the board_fit_config_name_match() to choose the right dtb.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Include the relevant configs to enable support for reading EEPROM in
R5SPL.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Add support for AM64 SoC identification.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable GPIO regulator.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Add DDR VTT regulator.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Add main domain GPIO nodes.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Introduce ddr node for am642 needed for all ddr configurations.

Also, introduce the 1600MTs DDR4 configuration that is supported on the
am642-evm.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Attempt to get and enable a vtt regulator if one is provided from the
dts. If we do not find one, continue as not all platforms have this.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Introduce support for the AM64 DDRSS controller which uses the 16bit
variation of the controller. This controller shares much functionality
with the existing J721e support, so this patch introduces only the new
code needed for am64 specific support from "_16bit_" files with headers
under "16bit/" include path/.

Also add a CONFIG_K3_AM64_DDRSS option to the choice required for use
with CONFIG_K3_DDRSS to allow selecting AM64 support.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Introduce a new version of the ddr driver which has the ability to
support different variations of the controller. Also introduce support
for the 32bit variation of the controller which is what was already
supported by the previous version used for J721e and J7200.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Create a new CONFIG_K3_DDRSS option to select the common parts of the
k3-ddrss driver. Also introduce a choice that depends on the top level
option to select CONFIG_K3_J721E_DDRSS for j721e support, and update
corresponding Kconfig as required.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>

Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation
of introducing additional support for other platforms to the same
driver.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>