- 04 6月, 2008 11 次提交
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由 Stefan Roese 提交于
Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch makes the common 4xx ECC code really usable on 440GP style platforms. Since the IBM DDR controller used on 440GP/GX/EP/GR is not register compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT we need to make some processor dependant defines used later on by the driver. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all ppc4xx related SDRAM/DDR/DDR2 controller defines. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch removes all SDRAM related defines from the PPC4xx headers ppc405.h and ppc440.h. This is needed since now some 405 PPC's use the same SDRAM controller as 440 systems do (like 405EX and 440SP). It also introduces new defines for the equipped SDRAM controller based on which PPC variant is used. There new defines are: used on 405GR/CR/EP and some Xilinx Virtex boards. used on 440GP/GX/EP/GR. used on 440EPx/GRx. used on 405EX/r/440SP/SPe/460EX/GT. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: NStefan Roese <sr@denx.de> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Grant Erickson 提交于
This patch (Part 2 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: NGrant Erickson <gerickson@nuovations.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Grant Erickson 提交于
This patch (Part 1 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: NGrant Erickson <gerickson@nuovations.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Grant Erickson 提交于
This patch simplifies post_word_{load,store} by using the preprocessor to eliminate redundant, copy-and-pasted code. Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
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由 Stefan Roese 提交于
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- 27 5月, 2008 5 次提交
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由 Wolfgang Denk 提交于
Conflicts: include/configs/socrates.h Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Sergei Poselenov 提交于
In case of several PCI USB controllers on a board this variable specifys which controller to use. See doc/README.generic_usb_ohci for details. Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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- 22 5月, 2008 3 次提交
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由 Christian Eggers 提交于
Signed-off-by: NChristian Eggers <ceggers@gmx.de> Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Christian Eggers 提交于
Signed-off-by: NChristian Eggers <ceggers@gmx.de> Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Sergei Poselenov 提交于
Add new configuration variable CONFIG_PCI_OHCI_DEVNO. In case of several PCI USB controllers on a board this variable specifys which controller to use. Also add USB support for sokrates board. See doc/README.generic_usb_ohci for details. Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com> Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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- 21 5月, 2008 21 次提交
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由 Stefan Roese 提交于
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由 Wolfgang Denk 提交于
introduced by 53677ef1 "Big white-space cleanup." Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
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由 York Sun 提交于
Reuse the existing DIU driver in board/freescale/common. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Add DIU and cfb console support to FSL 5121ADS board. Use #define CONFIG_VIDEO in config file to enable fb console. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Remove DPRINTF macro and replace it with generic debug macro. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
The clock divider has different format in 5121 and 8610. This patch moves it to board specific code. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Wolfgang Denk 提交于
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com> Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Sergei Poselenov 提交于
Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>
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由 Yuri Tikhonov 提交于
POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) with the GD_FLG_LOGINIT flag in gd->flags. This way we become able to utilize the full post_log_word for POST activities (overwise, POST ECC, which has 0x8000 ID, could be erroneously treated as started in post_output_backlog() even if there was actually no POST ECC run (because of OCM POST failure, for example). Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
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由 Yuri Tikhonov 提交于
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Yuri Tikhonov 提交于
Don't run futher tests in case of a test fails that is marked as POST_STOP. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
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由 Yuri Tikhonov 提交于
Switch the OCM testid with the codec one. The reason is that current implementation requires the POST_ROM testid to fit into lower 16 bits, and the codec test will never run with POST_ROM hopefully. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Yuri Tikhonov 提交于
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Yuri Tikhonov 提交于
Added OCM test to POST layer. This version runs before all other tests but doesn't yet interrupt post sequence on failure. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
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由 Yuri Tikhonov 提交于
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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