1. 04 6月, 2008 11 次提交
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      ppc4xx: Remove superfluous dram_init() call or replace it by initdram() · bbeff30c
      Stefan Roese 提交于
      Historically the 405 U-Boot port had a dram_init() call in early init
      stage. This function was still called from start.S and most of the time
      coded in assembler. This is not needed anymore (since a long time) and
      boards should implement the common initdram() function in C instead.
      
      This patch now removed the dram_init() call from start.S and removes the
      empty implementations that are scattered through most of the 405 board
      ports. Some older board ports really implement this dram_init() though.
      These are:
      
      csb272
      csb472
      ERIC
      EXBITGEN
      W7OLMC
      W7OLMG
      
      I changed those boards to call this assembler dram_init() function now
      from their board specific initdram() instead. This *should* work, but please
      test again on those platforms. And it is perhaps a good idea that those
      boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
      some time. So further patches welcome here.
      Signed-off-by: NStefan Roese <sr@denx.de>
      bbeff30c
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      192f90e2
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      ppc4xx: Fix common ECC generation code for 440GP style platforms · 39b32be1
      Stefan Roese 提交于
      This patch makes the common 4xx ECC code really usable on 440GP style
      platforms.
      
      Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
      compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
      we need to make some processor dependant defines used later on by the
      driver.
      Signed-off-by: NStefan Roese <sr@denx.de>
      39b32be1
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      ppc4xx: Change Kilauea to use the common DDR2 init function · ec724f88
      Stefan Roese 提交于
      This patch changes the kilauea and kilauea_nand (for NAND booting)
      board port to not use a board specific DDR2 init routine anymore. Now
      the common code from cpu/ppc4xx is used.
      
      Thanks to Grant Erickson for all his basic work on this 405EX early
      bootup.
      Signed-off-by: NStefan Roese <sr@denx.de>
      ec724f88
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      ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2 · 17ceb069
      Stefan Roese 提交于
      This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
      ppc4xx related SDRAM/DDR/DDR2 controller defines.
      Signed-off-by: NStefan Roese <sr@denx.de>
      17ceb069
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      ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1 · 36ea16f6
      Stefan Roese 提交于
      This patch removes all SDRAM related defines from the PPC4xx headers
      ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
      the same SDRAM controller as 440 systems do (like 405EX and 440SP).
      
      It also introduces new defines for the equipped SDRAM controller based on
      which PPC variant is used. There new defines are:
      
      used on 405GR/CR/EP and some Xilinx Virtex boards.
      
      used on 440GP/GX/EP/GR.
      
      used on 440EPx/GRx.
      
      used on 405EX/r/440SP/SPe/460EX/GT.
      Signed-off-by: NStefan Roese <sr@denx.de>
      36ea16f6
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      ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S · 64852d09
      Stefan Roese 提交于
      This patch consolidates the 405 and 440 parts of the NAND booting code
      selected via CONFIG_NAND_SPL. Now common code is used to initialize the
      SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
      Only *after* running from this location, nand_boot() is called.
      
      Please note that the initsdram() call is now moved from nand_boot.c
      to start.S. I experienced problems with some boards like Kilauea
      (405EX), which don't have internal SRAM (OCM) and relocation needs to
      be done to SDRAM before the NAND controller can get accessed. When
      initdram() is called later on in nand_boot(), this can lead to problems
      with variables in the bss sections like nand_ecc_pos[].
      Signed-off-by: NStefan Roese <sr@denx.de>
      Acked-by: NScott Wood <scottwood@freescale.com>
      64852d09
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      ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling · 8a24c07b
      Grant Erickson 提交于
      This patch (Part 2 of 2):
      
      * Rolls up a suite of changes to enable correct primordial stack and
        global data handling when the data cache is used for such a purpose
        for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
      
      * Related to the first, unifies DDR2 SDRAM and ECC initialization by
        eliminating redundant ECC initialization implementations and moving
        redundant SDRAM initialization out of board code into shared 4xx
        code.
      
      * Enables MCSR visibility on the 405EX(r).
      
      * Enables the use of the data cache for initial RAM on
        both AMCC's Kilauea and Makalu and removes a redundant
        CFG_POST_MEMORY flag from each board's CONFIG_POST value.
      
        - Removed, per Stefan Roese's request, defunct memory.c file for
          Makalu and rolled sdram_init from it into makalu.c.
      
      With respect to the 4xx DDR initialization and ECC unification, there
      is certainly more work that can and should be done (file renaming,
      etc.). However, that can be handled at a later date on a second or
      third pass. As it stands, this patch moves things forward in an
      incremental yet positive way for those platforms that utilize this
      code and the features associated with it.
      Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
      Signed-off-by: NStefan Roese <sr@denx.de>
      8a24c07b
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      ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling · c821b5f1
      Grant Erickson 提交于
      This patch (Part 1 of 2):
      
      * Rolls up a suite of changes to enable correct primordial stack and
        global data handling when the data cache is used for such a purpose
        for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
      
      * Related to the first, unifies DDR2 SDRAM and ECC initialization by
        eliminating redundant ECC initialization implementations and moving
        redundant SDRAM initialization out of board code into shared 4xx
        code.
      
      * Enables MCSR visibility on the 405EX(r).
      
      * Enables the use of the data cache for initial RAM on
        both AMCC's Kilauea and Makalu and removes a redundant
        CFG_POST_MEMORY flag from each board's CONFIG_POST value.
      
        - Removed, per Stefan Roese's request, defunct memory.c file for
          Makalu and rolled sdram_init from it into makalu.c.
      
      With respect to the 4xx DDR initialization and ECC unification, there
      is certainly more work that can and should be done (file renaming,
      etc.). However, that can be handled at a later date on a second or
      third pass. As it stands, this patch moves things forward in an
      incremental yet positive way for those platforms that utilize this
      code and the features associated with it.
      Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
      Signed-off-by: NStefan Roese <sr@denx.de>
      c821b5f1
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      PPC4xx: Simplified post_word_{load, store} · a4396800
      Grant Erickson 提交于
      This patch simplifies post_word_{load,store} by using the preprocessor
      to eliminate redundant, copy-and-pasted code.
      Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
      a4396800
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      10a33679
  2. 27 5月, 2008 5 次提交
  3. 22 5月, 2008 3 次提交
  4. 21 5月, 2008 21 次提交