- Clean up ifdeffery
- Update coding style

No functional change should have occurred.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Acked-by: NWolfgang Denk <wd@denx.de>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Some U-Boot images for X-ES boards support multiple products in the same
family.  For example, the XPedite5370, XPedite5371, and XPedite5372 are
similar enough that one U-Boot image can work on all 3 cards.  To make it
clear that a U-Boot image can work on boards of the same family, rename
the boards with the least significant digit of 'x'.

While we're at it, change the board config file and make targets to be
lowercase.

Also change the default uImage and fdt filenames to "board.uImage" and
"board.dtb" to be more generic.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.

Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
 ## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
 *** failed ***
 ### ERROR ### Please RESET the board ###

With this patch, NOR flash initialization is skipped:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: Uninitialized - Write Protect On
 L2:    1024 KB enabled
 NAND:  1024 MiB
 ...

Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.
Signed-off-by: NJohn Schmoller <jschmoller@xes-inc.com>
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Create a common checkboard() function to support all X-ES's Freescale
boards.

Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is.  This allows one
U-Boot image to support multiple boards.
Signed-off-by: NJohn Schmoller <jschmoller@xes-inc.com>
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add a new 'pci enum' command which re-enumerates the PCI buses.  This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.

Also enable the 'pci enum' command for X-ES's Freescale-based boards.
Signed-off-by: NJohn Schmoller <jschmoller@xes-inc.com>
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NWolfgang Denk <wd@denx.de>

Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The recent change the env code added an additional 32 bytes into gd_t
and that causes to grow pass the previous CONFIG_SYS_GBL_DATA_SIZE size.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Commit 29c6fbe0 broke
building for 83xx boards with USB support:

ehci-fsl.c: In function 'ehci_hcd_init':
ehci-fsl.c:43: error: 'CONFIG_SYS_FSL_USB_ADDR' undeclared (first use in this function)
ehci-fsl.c:43: error: (Each undeclared identifier is reported only once
ehci-fsl.c:43: error: for each function it appears in.)
make[1]: *** [ehci-fsl.o] Error 1
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

If a NOR flash is write protected it can not be initialized/detected so
add the ability for boards to skip NOR initialization on bootup.  A
board can skip NOR initialization by implementing the
board_flash_wp_on() function.
Signed-off-by: NJohn Schmoller <jschmoller@xes-inc.com>
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
CC: sr@denx.de
Acked-by: NStefan Roese <sr@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Add missing codes according to original datasheet.
This patch also makes ftrtc010 could be adapted to PCLK and EXT_CLK.
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>

This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.
Signed-off-by: NSteve Sakoman <steve.sakoman@linaro.org>
Tested-by: NHeiko Schocher <hs@denx.de>

This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.
Signed-off-by: NSteve Sakoman <steve.sakoman@linaro.org>
Tested-by: NHeiko Schocher <hs@denx.de>

This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.

Signed-off-by: Steve Sakoman <steve.sakomanlinaro.org>
Tested-by: NHeiko Schocher <hs@denx.de>

This patch matches the poll interval (1 millisecond) and timeout (1 second)
used in the linux driver. It also adds a return value of 0 in the event of
a timeout error and cleans up some formatting errors in that section of the
code.
Signed-off-by: NSteve Sakoman <steve.sakoman@linaro.org>
Tested-by: NHeiko Schocher <hs@denx.de>

Commit 0ad7f095 [ppc4xx: cleanup
default environment for AMCC boards] broke the default env for
many PPC4xx boards. The '\0' character got removed at the end
of some environment commands like "update". This patch adds the
missing '\0' characters again.
Signed-off-by: NStefan Roese <sr@denx.de>

Until now, the Sequoia RAM-booting image disabled NOR flash support
as this image was mainly created for NAND-only boards. This patch
now enables NOR flash support for this RAM-booting version as well.
Signed-off-by: NStefan Roese <sr@denx.de>

Add CONFIG_POST_UART to implement a board specific UART POST test.
This is done since lwmon5 needs to set POST_ALWAYS to run this
test on each reboot. And we don't want to change the default
behavious of this this.
Signed-off-by: NStefan Roese <sr@denx.de>

Remove uneccessary functions to access the TCR/TSR registers as well.
Signed-off-by: NStefan Roese <sr@denx.de>

uli526x.c: In function 'uli526x_init_one':
uli526x.c:314:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
uli526x.c:314:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On an XPedite5370 over 11KBytes were saved:
  Before:
       text	   data	    bss	    dec	    hex	filename
   332456	  33364	  33476	 399296	  617c0	./u-boot

  After:
      text	   data	    bss	    dec	    hex	filename
   321075	  33836	  33476	 388387	  5ed23	./u-boot
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On an XPedite5170 over 11KBytes were saved:
  Before:
     text	   data	    bss	    dec	    hex	filename
   319488	  28700	  33204	 381392	  5d1d0	./u-boot

  After:
     text	   data	    bss	    dec	    hex	filename
   307663	  29144	  33204	 370011	  5a55b	./u-boot
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Previously io_sel=0xe incorrect stated PCIE1 was enabled.  Also add
support for the mpc8640's PCIE2 interface.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Update to use the recent, common FSL PCI initialization code.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
CC: sr@denx.de
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Update to use the recent, common FSL PCI initialization code.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
CC: joe.hamman@embeddedspecialties.com
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Update to use the recent, common FSL PCI initialization code.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks).  By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are brought out of reset and held
in spinloops.  Setting the "mp_holdoff" environment variable to 'yes'
or '1' will cause U-Boot to leave secondary cores in their default
state.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

When DDR controller interleaving is eabled and less than all bank (chip-select)
interleaving is seletected, the unused chip-select should be disabled.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,

hwconfig=fsl_ddr:sdram=fixed

To use SPD parameters,

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Using PIC TFRR register for post word load/store for generic MPC85xx.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The memory test is performed after DDR initialization when U-boot stills runs
in flash and cache. On recent mpc85xx platforms, the total memory can be more
than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a
sliding TLB window. After the testing, DDR is remapped with up to 2GB memory
from the lowest address as normal.

If memory test fails, DDR DIMM SPD and DDR controller registers are dumped for
further debugging.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

A worker function setup_ddr_tlbs_phys() is introduced to implement more
control on physical address mapping.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The device tree (fdt) must always exist in within the bootmap (usually the
first 16MB of RAM).  If it doesn't, then boot_relocate_fdt() will allocate
an LMB region in the bootmap and copy the fdt into that region.  It will
also increase the size of the fdt.

If the fdt is already in the bootmap, then previously the memory was just
reserved.  There was no contingency if the reservation failed, however.

By always allocating an lmb region and copying/resizing the fdt into that
region, the code is simplified and the memory region is always allocated
properly.

Also change the types of some variables to avoid some typecasts.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Tested-by: NIra Snyder <iws@ovro.caltech.edu>
Acked-by: NGerald Van Baren <vanbaren@cideas.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add a common helper that will set the PHY connection type based on enum.
We use this on eTSEC, UCC, and will with Fman in the future.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Have a common enum for phy types that we use in the UCC driver.  We will
also use this enum for dealing with phy connection fixup in the device
tree.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>