- 19 12月, 2010 1 次提交
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由 Matthew McClintock 提交于
Add reginfo as a default command for p1022ds boards Signed-off-by: NMatthew McClintock <msm@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 18 12月, 2010 15 次提交
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由 Florian Fainelli 提交于
This command is used to read the device ONFI parameters page. Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
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由 Lei Wen 提交于
Yaffs image require to use the oob to store some info, so when we burn the yaffs image, we need to also write the image's oob part into flash. This patch add addition suffix to onenand write to give the uboot the power to directly burn the yaffs image to onenand. Signed-off-by: NLei Wen <leiwen@marvell.com>
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由 Reinhard Meyer 提交于
This is part of the timer cleanup effort. In the future we only use get_timer() in its intended way to program timeout loops. reset_timer() shall not be used anymore. Signed-off-by: NReinhard Meyer <u-boot@emk-elektronik.de>
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由 Mike Frysinger 提交于
These id tables need not be writable. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Multiple rules are using the expanded AFLAGS/CFLAGS settings and some are getting so long that the rules need to be line wrapped. So unify them in one variable, use that variable in the rule, and then unwrap things. This makes the actual `make` output nicer as it doesn't have line continuations in it anymore. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Timur Tabi 提交于
In some usages of inline assembly, hard-coded registers were specified when a scratch register should have been used instead. Signed-off-by: NTimur Tabi <timur@freescale.com>
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由 Mike Frysinger 提交于
The non-reentrant versions of the hashtable functions operate on a single shared hashtable. So if two different people try using these funcs for two different purposes, they'll cause problems for the other. Avoid this by converting all existing hashtable consumers over to the reentrant versions and then punting the non-reentrant ones. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Peter Tyser 提交于
The following commit: commit 882b7d72 Author: Mike Frysinger <vapier@gentoo.org> Date: Wed Oct 20 03:41:17 2010 -0400 do_reset: unify duplicate prototypes missed the 74xx_7xx and mpc86xx arches and the ppmc7xx board do_reset() functions which resulted in build errors such as: cpu.c:128: error: conflicting types for 'do_reset' include/command.h:102: error: previous declaration of 'do_reset' was here Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Joakim Tjernlund 提交于
By rearranging the linker script we get support for relocation of -fpic for free. Move __got2_entries outside _GOT2_TABLE_ defining scope matching the rest of PowerPC Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: NScott Wood <scottwood@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Joakim Tjernlund 提交于
By rearranging the linker script we get support for relocation of -fpic for free. Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: NScott Wood <scottwood@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Priyanka Jain 提交于
PT7C4338 chip is being manufactured by Pericom Technology Inc. It is a serial real-time clock which provides: 1)Low-power clock/calendar. 2)Programmable square-wave output. It has 56 bytes of nonvolatile RAM. Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Acked-by: NTimur Tabi <timur@freescale.com>
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由 Heiko Schocher 提交于
New default partitions on nor flash: 640k (firmware) 1408k (kernel) 2m (initrd) 4m (small-fs) 24320k (big-fs) 256k (dts) Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 17 12月, 2010 24 次提交
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由 Wojtek Skulski 提交于
While we're here, cut out the useless id defines too. Signed-off-by: NWojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Chong Huang 提交于
Signed-off-by: NChong Huang <chuang@ucrobotics.com> Signed-off-by: NHaitao Zhang <minipanda@linuxrobot.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Stefan Roese 提交于
This patch adds the possibility to (optinally) write to the flash configuration register. The Intel style CFI chips support such a register that can be used to configure the operation mode to a non-default value. This method will be used by the t3corp board, which needs to configure the DS617 Xilinx flash for async read mode. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
The function sector_erased() is modified to not use pointer access, but to use the correct accessor functions. This fixes a problem on the t3corp board with the Xilinx DS617 flash chips. Here a board specific accessor function is needed to read from flash in 32bit mode. This patch enables such an operation mode. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch adds some calls to set the flash chip in the read-status- register- or read-id-mode before the corresponding register is read back. This problem was detected while porting the common CFI driver to support the Xilinx DS617 flash chips. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Ricardo Ribalda Delgado 提交于
Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards. Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch changes the PPC4xx ethernet POST loop test count from currently 192 (256 - 64) to a default of 10. While doing this the max frame size is increased. Each loop run uses a different frame size, starting with a max of 1514 bytes, down to 64. The default loop count of 10 can be overriden using CONFIG_SYS_POST_ETH_LOOPS in the board config header. The TEST_NUM loop has been removed as it was never used. The main reason for this change is to reduce the boot time on boards using this POST test, like the lwmon5 board. This change reduces the boot time by about 600ms on the lwmon5 board. Signed-off-by: NStefan Roese <sr@denx.de> Acked-by: NWolfgang Denk <wd@denx.de>
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由 Stefan Roese 提交于
This patch includes the following changes for the lwmon5 board support: - Enable cache in SDRAM - Use common EHCI driver instead of the PPC4xx specific OHCI driver This can be done since only high-speed devices are connected. - Remove cached TLB entry again after ECC setup - Use correct define for cache enabling (CONFIG_4xx_DCACHE instead of CONFIG_SYS_ENABLE_SDRAM_CACHE) - Enable FIT image support Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Ths old comment was quite screwed up. Replace it with a new version that should be a bit more descriptive. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
The t3corp board has an Xilinx DS617 flash chip connected to the onboard FPGA. This patch adds support for these chips. Board specific flash accessor functions are needed, since the chips can only be read correctly in 16bit mode. Additionally the FPGA chip-selects are configured for device-paced transfers (ready is enabled). Signed-off-by: NStefan Roese <sr@denx.de>
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由 Scott Wood 提交于
Recent GCC (4.4+) performs out-of-line epilogues in some cases, when optimizing for size. It causes a link error for _restgpr_30_x (and similar) if libgcc is not linked. It actually increases size with very small binaries, due to the fixed size of the out-of-line code, and not having any functions that actually need to restore more than 2 or 3 registers. But I don't see a way to turn it off, other than asking GCC to optimize for speed -- which may also increase size for some boards. Signed-off-by: NScott Wood <scottwood@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com> Acked-by: NWolfgang Denk <wd@denx.de>
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由 Simon Kagstrom 提交于
Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
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由 Prafulla Wadaskar 提交于
Aspenite is a Development Board for ASPEN/ARMADA168(88AP168) with * Processor upto 1.2GHz * Parallel 1Gb x8 DDR2-1066 MHz * 16 Mb x16 NOR, 4Gb x8 SLC NAND, footprint for SPI NOR * Footprints for eMMC/eSD NAND & MMC x8 card * 4-in-1 card reader (xD, MMC/SD/MS Pro), CF True IDE socket * SEAF memory board, subset of PISMO2 With Peripherals: * 4.3” WVGA 24-bit LCD * Audio codecs (AC97 & I2S), TSI * VGA camera * Video in via 3 RCA jacks, and HDMI type C out * Marvell 88W8688 802.11bg/BT module * GPS RF IC * Dual analog mics & speakers, headset jack, LED, ambient light sensor * USB2.0 HS host (A), OTG (micro AB) * FE PHY, PCIE Mini Card slot * GPIO, GPIO expander with DIP switches for easier selection UART serial over USB, CIR This patch adds basic board support with DRAM and UART functionality The patch is tested for boot from DRAM using XDB Signed-off-by: NMahavir Jain <mjain@marvell.com> Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
This patch adds commonly used macros for ARMADA100 based baords, Also some code reshuffled and updated for typos and comments Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
ARMADA 100 SoCs has NS16550 compatible UART peripheral This patch enables the same for ARMADA100 platforms Signed-off-by: NMahavir Jain <mjain@marvell.com> Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
On some processors this ier register configuration is different for ex. Marvell Armada100 This patch introduce CONFIG_SYS_NS16550_IER macro support to unconditionally initialize this register. Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
This patch adds the support MFP support for Marvell ARMADA100 SoCs Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers For ex. ARMADA100. These registers are programmed to expose the specific functionality associated with respective SoC Pins This driver provides configuration APIs, using them, configuration need to be done in board specific code for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality int board_early_init_f(void) { u32 mfp_cfg[] = { /* Console on UART1 */ MFP107_UART1_RXD, MFP108_UART1_TXD, MFP_EOC /*End of configureation*/ }; /* configure MFP's */ mfp_config(mfp_cfg); return 0; } Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
ARMADA 100 Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/applications/armada_100 SoC versions Supported: 1) ARMADA168/88AP168 (Aspen P) 2) ARMADA166/88AP166 (Aspen M) 3) ARMADA162/88AP162 (Aspen L) Contributors: Eric Miao <eric.y.miao@gmail.com> Lei Wen <leiwen@marvell.com> Mahavir Jain <mjain@marvell.com> Signed-off-by: NMahavir Jain <mjain@marvell.com> Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Wolfgang Denk 提交于
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由 Heiko Schocher 提交于
- serial console in PSC1 - 128MiB DRAM - 32MiB Flash - FEC Ethernet - 2 I2C busses - FPGA on CS3 - IDE - VGA SMI501 Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Asen Dimov 提交于
Signed-off-by: NAsen Dimov <dimov@ronetix.at>
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由 Asen Dimov 提交于
Signed-off-by: NAsen Dimov <dimov@ronetix.at>
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