- 07 6月, 2014 11 次提交
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由 pekon gupta 提交于
GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: NPekon Gupta <pekon@ti.com>
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由 David Mosberger 提交于
As per following Sections in ONFI Spec, GET_FEATURES and SET_FEATURES also need byte-addressing on 16-bit devices. *Section: Target Initialization" "The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus. The host shall not issue commands that use a word data width on x16 devices until the host determines the device supports a 16-bit data bus width in the parameter page." *Section: Bus Width Requirements* "When the host supports a 16-bit bus width, only data is transferred at the 16-bit width. All address and command line transfers shall use only the lower 8-bits of the data bus. During command transfers, the host may place any value on the upper 8-bits of the data bus. During address transfers, the host shall set the upper 8-bits of the data bus to 00h." So porting following commit from linux kernel commit e34fcb07a6d57411de6e15a47724fbe92c5caa42 Author: David Mosberger <davidm@egauge.net> (preserving authorship) mtd: nand: fix GET/SET_FEATURES address on 16-bit devices Signed-off-by: NPekon Gupta <pekon@ti.com>
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由 Brian Norris 提交于
As per following Sections in ONFI Spec, NAND_CMD_READID should use only lower 8-bit for transfering command, address and data even on x16 NAND device. *Section: Target Initialization" "The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus. The host shall not issue commands that use a word data width on x16 devices until the host determines the device supports a 16-bit data bus width in the parameter page." *Section: Bus Width Requirements* "When the host supports a 16-bit bus width, only data is transferred at the 16-bit width. All address and command line transfers shall use only the lower 8-bits of the data bus. During command transfers, the host may place any value on the upper 8-bits of the data bus. During address transfers, the host shall set the upper 8-bits of the data bus to 00h." Thus porting following commit from linux-kernel to ensure that column address is not altered to align to x16 bus when issuing NAND_CMD_READID command. commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7 mtd: nand: force NAND_CMD_READID onto 8-bit bus Author: Brian Norris <computersforpeace@gmail.com> (preserving authorship) The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Signed-off-by: NPekon Gupta <pekon@ti.com>
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由 Brian Norris 提交于
Porting below commit from linux-tree, preserving original authorship & commit log commit bd9c6e99b58255b9de1982711ac9487c9a2f18be Author: Brian Norris <computersforpeace@gmail.com> mtd: nand: don't use read_buf for 8-bit ONFI transfers Use a repeated read_byte() instead of read_buf(), since for x16 buswidth devices, we need to avoid the upper I/O[16:9] bits. See the following commit for reference: commit 05f7835975dad6b3b517f9e23415985e648fb875 (from linux-tree) Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Date: Thu Dec 5 22:22:04 2013 +0100 mtd: nand: don't use {read,write}_buf for 8-bit transfers Now, I think that all barriers to probing ONFI on x16 devices are removed, so remove the check from nand_flash_detect_onfi(). Signed-off-by: NPekon Gupta <pekon@ti.com>
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由 pekon gupta 提交于
This patch omap-elm.c: replaces -ve integer value returned during errorneous condition, with proper error-codes. omap-gpmc.c: updates omap-gpmc driver to pass error-codes returned from omap-elm driver to upper layers Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
This patch tries to avoid some local pointer dereferences, by using common local variables in omap_correct_data_bch() Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
This patch renames 'struct nand_bch_priv' which currently holds private data only for BCH ECC schemes, into 'struct omap_nand_info' so that same can be used for all ECC schemes Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
This patch prepares to refactor 'struct nand_bch_priv' -> 'struct omap_nand_info' And thus performs following clean-ups: - remove nand_bch_priv.type: use nand_bch_priv.ecc_scheme instead - remove nand_bch_priv.mode: <unused> Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
This patch adds macros for following parameters of ELM Hardware engine - ELM_MAX_CHANNELS: ELM can process 8 data streams simultaneously - ELM_MAX_ERRORS: ELM can detect upto 16 ECC error when using BCH16 scheme Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
ELM hardware engine support ECC error detection for multiple ECC strengths like +------+------------------------+ |Type | ECC syndrome length | +------+------------------------+ |BCH4 | 6.5 bytes = 13 nibbles | |BCH8 | 13 byte = 26 nibbles | |BCH16 | 26 bytes = 52 nibbles | +------+------------------------+ Current implementation of omap_elm driver uses ECC syndrom length (in 'nibbles') to differentiate between BCH4/BCH8/BCH16. This patch replaces it with 'bch_type' Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 pekon gupta 提交于
There is no dependency of omap_elm.c on omap_gpmc.h Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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- 02 6月, 2014 1 次提交
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由 Albert ARIBAUD 提交于
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- 31 5月, 2014 1 次提交
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由 Doug Anderson 提交于
Setting ps_hold ought to be one of the first things we do when we first boot up. If we wait until the main u-boot runs we won't set it in time and the PMIC may power us back off. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 29 5月, 2014 1 次提交
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由 Piotr Wilczek 提交于
Add CONFIG_SYS_GENERIC_BOARD for all Exynos4 boards. Signed-off-by: NPiotr Wilczek <p.wilczek@samsung.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 28 5月, 2014 12 次提交
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由 Simon Glass 提交于
Add the ability to display the code offset of an initcall even after it is relocated. This makes it much easier to relate initcalls back to the U-Boot System.map file. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NLukasz Majewski <l.majewski@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
Enable LCD for snow. This is a 1366 x 768 panel. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
There is quite a tight deadline in enabling PSHOLD, less than a second. In some cases (e.g. with USB download), U-Boot takes longer than that to load, so the board powers off before U-Boot starts. Add a call in SPL to enable PSHOLD. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NLukasz Majewski <l.majewski@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Aaron Durbin 提交于
The TSP65090 is a PMIC on some exynos5 boards. The init function is called for the TPS65090 pmic. If that device is not a part of the device tree (returns -ENODEV) then continue. Otherwise return a failure. Signed-off-by: NAaron Durbin <adurbin@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Aaron Durbin 提交于
The current pmic i2c code assumes the current i2c bus is the same as the pmic device's bus. There is nothing ensuring that to be true. Therefore, select the proper bus before performing a transaction. Signed-off-by: NAaron Durbin <adurbin@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Aaron Durbin 提交于
The TPS65090 pmic chip can be on exynos5250 boards. Therefore, select the appropriate config option for TPS65090 devices. This commit should really use exynos5-dt.c, when it is available. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Tom Wai-Hong Tam 提交于
This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: NTom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: NHatim Ali <hatim.rv@samsung.com> Signed-off-by: NKatie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: NRong Chang <rongchang@chromium.org> Signed-off-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NVincent Palatin <vpalatin@chromium.org> Signed-off-by: NAaron Durbin <adurbin@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
This enum should be common across all PMICs rather than having it independently defined with the same name in multiple places. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
Commit be3b51aa did this mostly, but several have been added since. Do the job again. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NLukasz Majewski <l.majewski@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
This is not used by any boards now. Drop it to avoid confusion. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Simon Glass 提交于
Now that the GPIO numbering series has been applied, we can use the correct GPIO for the EC interrupt. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 27 5月, 2014 14 次提交
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由 Wu, Josh 提交于
In this configuration the environment will save in file: uboot.env of mmc card. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
Also we enable the mmc command in configuration file. As both CONFIG_CMD_MMC and CONFIG_CMD_USB use the CONFIG_DOS_PARTITION, so remove the redundant CONFIG_DOS_PARTITION definition. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
As at91 board config file will include the SoC header, so we can remove the ARM926EJS definition in board config files. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
Now the AT91FAMILY is already defined in the at91 SoC header. The at91 board config file will include the SoC header file. So we can remove the redundant AT91FAMILY definition in at91 board config files. Signed-off-by: NJosh Wu <josh.wu@atmel.com> [rebase patch] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
The at91x40.h is not exist. So we remove it. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
For sama5d3xek we need to modify the SPL image for correct detection by ROM code. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
The new atmelimage converts a machine code BLOB to bootable ROM image. Atmel ROM has no sophisticated image format, it only checks the first 7 ARM vectors. The vectors can contain valid B or LDR opcodes, the 6'th vector contains the image size to load. Additionally the PMECC header can be written by the atmelimage target. The parameters must be given via the -n switch as a coma separated list. For example: mkimage -T atmelimage \ -n usePmecc=1,sectorPerPage=4,sectorSize=512,spareSize=64,eccBits=4,eccOffset=36 \ -d spl/u-boot-spl.bin boot.bin A provided image can be checked for correct header setup. It prints out the PMECC header parameters if it has one and the 6'th interrupt vector content. ---8<--- Image Type: ATMEL ROM-Boot Image with PMECC Header PMECC header ==================== eccOffset: 36 sectorSize: 512 eccBitReq: 4 spareSize: 64 nbSectorPerPage: 4 usePmecc: 1 ==================== 6'th vector has 17044 set --->8--- A SPL binary modified with the atmelimage mkimage target was succesfully booted on a sama5d34ek via MMC and NAND. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Heiko Schocher <hs@denx.de> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Heiko Schocher <hs@denx.de>
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由 Wu, Josh 提交于
Signed-off-by: NJosh Wu <josh.wu@atmel.com> [fix checkpatch line length warning] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
We need check the NULL pointer as at91_pio_get_port() may return NULL. Also print a error message when at91_pio_get_port() failed otherwise we cannot notice the failure. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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