- 08 12月, 2016 9 次提交
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由 Michal Simek 提交于
axi_emac, emaclite and gem have the same issue with registering multiple instances with mdio busses. mdio bus name has to be uniq but drivers are setting up only one name for all. Use mdio_register_seq() and pass dev->seq number to allow multiple mdio instances registration. Reported-by: NPhani Kiran Kara <phanikiran.kara@gmail.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Series-to: u-boot Series-cc: Phani Kiran Kara <phanikiran.kara@gmail.com>
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由 Michal Simek 提交于
The most of ethernet drivers are using this mdio registration sequence. strcpy(priv->bus->name, "emac"); mdio_register(priv->bus); Where driver can be used only with one MDIO bus because only unique name should be used. Other drivers are using unique device name for MDIO registration to support multiple instances. snprintf(priv->bus->name, sizeof(bus->name), "%s", name); With DM dev->seq is used more even in logs (like random MAC address generation: printf("\nWarning: %s (eth%d) using random MAC address - %pM\n", dev->name, dev->seq, pdata->enetaddr); ) where eth%d prefix is used. Simplify driver code to register mdio device with dev->seq number to simplify mdio registration and reduce code duplication across all drivers. With DM_SEQ_ALIAS enabled dev->seq reflects alias setting. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> --- For example: Board: Xilinx Zynq Net: ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id Warning: ethernet@e000b000 (eth0) using random MAC address - 7a:fc:90:53:6a:41 eth0: ethernet@e000b000ZYNQ GEM: e000c000, phyaddr ffffffff, interface rgmii-id Warning: ethernet@e000c000 (eth3) using random MAC address - 1a:ff:d7:1a:a1:b2 , eth3: ethernet@e000c000 ** Bad device size - mmc 0 ** Checking if uenvcmd is set ... Hit any key to stop autoboot: 0 Zynq> mdio list eth0: 17 - Marvell 88E1111S <--> ethernet@e000b000 eth3: 17 - Marvell 88E1111S <--> ethernet@e000c000 Zynq>
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由 Michal Simek 提交于
With origin files there was an issue with serdes setting for SCSI. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
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由 Nathan Rossi 提交于
The dram_init* functions for the zynq board are not safe for use from the board_init_f stage due to its use of the 'tmp' static variable. This incorrect use of a static variable was causing rare issues where the dram_init function would overwrite some parts the __rel_dyn section which caused obscure failures. Using the zynq_zybo configuration, U-Boot would generate the following error during image load. This was caused due to dram_init overwriting the relocations for the "image" variable within the do_bootm function. Out of coincidence the un-initialized memory has a compression type which is the same as the value for the relocation type R_ARM_RELATIVE. Uncompressing Invalid Image ... Unimplemented compression type 23 It should be noted that this is just one way the issue could surface, other cases my not be observed in normal boot flow. This change removes the existing code and copies the implementation of the dram_init and dram_init_banksize from the arch/arm/mach-uniphier/dram_init.c source. This version of these functions does not use static variables and behaves the same (reading banks from fdt, and using the first bank as the ram_size). Signed-off-by: NNathan Rossi <nathan@nathanrossi.com> Fixes: 758f29d0 ("ARM: zynq: Support systems with more memory banks") Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Use embded option because of qemu Use my repo till Stephen merge it. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
The patch is fixing: "tools: mkimage: Check if file is regular file" (sha1: 56c7e801) which contains two issues reported by Coverity Unchecked return value from stat and incorrect calling sequence where attack can happen between calling stat and fopen. Using pair in opposite order (fopen and fstat) is fixing this issue because fstat is using the same file descriptor (FILE *). Also fixing issue with: "tools: mkimage: Add support for initialization table for Zynq and ZynqMP" (sha1: 3b646080) where file wasn't checked that it is regular file. Reported-by: Coverity (CID: 154711, 154712) Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NTom Rini <trini@konsulko.com> Series-to: trini Series-cc: u-boot
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由 Michal Simek 提交于
This patch also includes ARM64 zynqmp changes: - Remove platform non DM initialization - Remove hardcoded sata base address Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Series-to: sjg, agraf@suse.de Series-cc: uboot Series-version: 4 Series-changes: 2 - make ceva_init_sata static - Move SATA_CEVA to defconfig - Initalized max_lun and max_id platdata Series-changes: 3 - Extend Kconfig help description - sort dm.h - Remove SPL undefinition from board file - Fix Kconfig dependecies
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由 Michal Simek 提交于
All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi_curr_dev pointer. intr_scsi() is commented now but it can be replaced by calling find_scsi_device() and scsi_scan(). scsi_dev_desc[] is commented out but common/scsi.c heavily depends on it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol is reassigned to a block description allocated by uclass. There is only one block description by device now but it doesn't need to be correct when more devices are present. scsi_bind() ensures corresponding block device creation. uclass post_probe (scsi_post_probe()) is doing low level init. SCSI/SATA DM based drivers requires to have 64bit base address as the first entry in platform data structure to setup mmio_base. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Series-changes: 2 - Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA Ceva sata has never used sata commands that's why keep it in SCSI part only. - Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c - Extend platdata Series-changes: 3 - Fix scsi_scan return path - Fix header location uclass-internal.h - Add scsi_max_devs under !DM_SCSI - Add new header device-internal because of device_probe() - Redesign block device creation algorithm - Use device_unbind in error path - Create block device with id and lun numbers (lun was there in v2) - Cleanup dev_num initialization in block device description with fixing parameters in blk_create_devicef - Create new Kconfig menu for SATA/SCSI drivers - Extend description for DM_SCSI - Fix Kconfig dependencies - Fix kernel doc format in scsi_platdata - Fix ahci_init_one - vendor variable Series-changes: 4 - Fix Kconfig entry - Remove SPL ifdef around SCSI uclass - Clean ahci_print_info() ifdef logic
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- 06 12月, 2016 16 次提交
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Yuan Yao 提交于
The default configuration for QSPI AHB bus can't support 16MB+. But some flash on NXP layerscape board are more than 16MB. Signed-off-by: NYuan Yao <yao.yuan@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 jerry.huang@nxp.com 提交于
Enable the errata-a005697 for ls1012a Signed-off-by: NChangming Huang <jerry.huang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Yuan Yao 提交于
Add the name for register space and memory space. <0x1550000 0x10000 > is the QSPI register space. <0x40000000 0x4000000> is the QSPI memory space. Signed-off-by: NYuan Yao <yao.yuan@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Shengzhou Liu 提交于
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Shengzhou Liu 提交于
Fix following warning in case multiple erratum macro was not defined. warning: unused variable 'tmp' warning: unused variable 'ddr_freq' Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Stefan Roese 提交于
Its easier to watch the output of the build process when the platforms specific boards are grouped in a separate job. This patch adds a job for all mvebu boards (arm and aarch64). Signed-off-by: NStefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Bartosz Golaszewski 提交于
The LCDC controller on the lcdk board has high memory throughput requirements. Even with the kernel-side tweaks to master peripheral and peripheral bus burst priorities, the default PLL0 frquency of 300 MHz is not enough to service the LCD controller and causes DMA FIFO underflows. Increment the PLL0 multiplier to 37, resulting in PLL0 frequency of 456 MHz - the same value that downstream reference u-boot from Texas Instruments uses. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Yegor Yefremov 提交于
First of all U-Boot would search for a USB mass storage device with either uEnv.txt or kernel-fit.itb and boot. If USB mass storage device is not available or doesn't provide these files then MMC will be tried. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Yegor Yefremov 提交于
Baltos devices provide a mPCIe slot, whose power is turned off by default. This patch activates mPCIe slot in U-Boot, so that for example GSM modem can be already available in user space. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Yegor Yefremov 提交于
Remove unneeded pinmux configurations and TI EEPROM struct. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
The bootrom may corrupt the area of SRAM used to store the ti_common_eeprom structure. This patch makes sure that it's always read after a reset, even if a valid MAGIC number is found in the SRAM. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Michal Simek 提交于
The patch "dm: spl: mmc: Support CONFIG_BLK in SPL MMC" (sha1: 87bce4e5) converted FAT part of spl_mmc_do_fs_boot() but forget to update also EXT part by 's/&mmc->block_dev/mmc_get_blk_desc(mmc)/'. This patch is fixing compilation error when CONFIG_SPL_EXT_SUPPORT is enabled. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 05 12月, 2016 15 次提交
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由 Stefan Roese 提交于
This patch fixes the warnings about misaligned cache on Armada XP: CACHE: Misaligned operation at range [7facb400, 7facb460] Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Not all memory is mapped in the MMU. So we need to restrict the memory size so that U-Boot does not try to access it. Also, the internal registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB are mapped for system memory. This is what we pass to the U-Boot subsystem here. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
This patch adds PCI support to the Marvell Armada-8K devel board. Additionally the Intel E1000 ethernet driver is enabled so that network support is available on this board, even without the internal network interfaces being supported (yet). Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
To use the PCIe driver, its controller memory and the PCIe regions need to get mapped in the MMU. Otherwise these areas can't be accessed. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Shadi Ammouri 提交于
This patch adds a driver for the PCIe controller integrated in the Marvell Armada-8K SoC. This controller is based on the DesignWare IP core. The original version was written by Shadi and Yehuda. I ported this driver to the latest mainline U-Boot version with DM support. Tested on the Marvell DB-88F8040 Armada-8K eval board. Signed-off-by: NShadi Ammouri <shadi@marvell.com> Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
With the support for the Armada 8k, a 2nd COMPHY controller now needs to get supported from the CP110 slave controller. This patch adds support for this 2nd contoller in the COMPHY driver. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
The Armada8k implements 2 CPs (communication processors) and the 2nd CP also is equipped with a COMPHY controller. This patch now loops over all enabled MISC devices (CP110) enabled in the DT to initialize all CPs. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will not be able to use the SPI NOR chip for environment storage and use "i2c dev 0" to select this I2C bus. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
This patch adds the COMPHY device tree configuration to the DT file for the Marvell DB-88F8040 devel board. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave dtsi file for the Armada 8K. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
Since the cp110 slave also has comphy DT nodes, the names need to be renamed to avoid a name clash. Lets use the common naming scheme: "cpm_xxx" for master and "cps_xxx" for slave. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
This patch adds the necessary files to support the Marvell Armada 8k devel board. Most board specfic files are shared with the Armada 7k boards under the name "armada-8k*". So only minimal changes are necessary to add this basic board support (except the DT files of course). Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
To enable access to the slave CP its memory needs to be added to the MMU memory map. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
This patch uses of_machine_is_compatible() to detect the board at runtime and only configured the I2C IO expander for the xHCI power / reset on the DB-88F7040 board. As this code will be used by other Armada-7k/8k ports, its necessary to use this runtime detection here. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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由 Stefan Roese 提交于
Add the latest version of the DT files from the Linux kernel. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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