Now that we've everything prepared for it remove the DM settings from the
defconfig(s) and simply always set them for sunxi.

This makes all sunxi boards allways use the driver model for gpios and
ethernet, and allows us to move over more bits to the driver-model without
the need to introduce #ifdef-ery for boards which are not yet using DM.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This is a preparation patch for switching all sunxi boards over to using
the driver model.

Note that rather then defining both CONFIG_DEFAULT_DEVICE_TREE (for u-boot)
and CONFIG_FDTFILE (for the kernel), this commit simply replaces all
CONFIG_FDTFILE defconfig settings with CONFIG_DEFAULT_DEVICE_TREE and
uses CONFIG_DEFAULT_DEVICE_TREE for setting the default fdtfile env value
in sunxi-common.h .
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Bring all the sunxi dts files (and update existing ones) from
mripard/sunxi/dt-for-4.1 (which will be merged into upstream master any
day now). This is necessary so that we can move all sunxi boards over to
the driver model.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This is a preparation-patch for adding device-model support to the emac
driver.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NStefan Roese <sr@denx.de>

netdev.h should not be included in driver-model enabled builds (doing so
causes compiler warnings about struct eth_driver not being declared), but
we do use sunxi_gmac_initialize in the driver-model case, so move it out of
netdev.h .
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Move the axp-gpio code out of the drivers/power/axp*.c code, and into
a new separate axpi-gpio driver.

This change drops supports for the gpio3 pin on the axp209, as that requires
special handling, and no boards are using it.

Besides cleaning things up by moving the code to a separate driver, as
a bonus this change also adds support for the (non vusb) gpio pins on the
axp221 and the gpio pins on the axp152.

The new axp-gpio driver gets its own Kconfig option, and is only enabled
on boards which need it. Besides that it only gets enabled in the regular
u-boot build and not for the SPL as we never need it in the SPL.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Move the register helpers used to access the registers via p2wi resp.
rsb bus on the otherwise identical axp221 and axp223 pmics to a separate
file, so that they can be used by the upcoming standalone axp gpio driver
too.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Change the axp_gpio_foo function prototypes to match the gpio uclass op
prototypes, this is a preparation patch for moving the axp gpio code to
a separate driver-model gpio driver.

Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c
this adds are removed in a later patch.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This fixes the following errors being printed during boot:

Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Provide an option to write filesystem independend commands.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for loading sw for R5 with enabling for zynqmp.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>

Define the mmu table till 2MB granularity
enable dcaches for zynqmp.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The PicoZed is a System-on-Module board which is marketed as part of
the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000
processor.

This patch adds support that covers all the variants of the PicoZed
including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This
patch set however only covers support for the System-on-Module and does
not cover any extra components that are available on carrier boards
(except those that are fanned out of the module itself).

More information on this board, its variants and available carrier
boards is available at: http://zedboard.org/product/picozedSigned-off-by: NNathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable GPIO driver and GPIO commands.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add a new member 'flags' in struct spi_flash to store the flash flags
during spi_flash_validate_params().
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and
board variant on the fly and change the dtb name.

Based on the scheme done on am335x board.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Tested-By: NVagrant Cascadian <vagrant@debian.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

README file suggests to use 'fdtfile' for the dtb file name and
'fdt_addr_r' for the dtb address in RAM, so do as suggested.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This patch adds esdhc support for ls2085a.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Enable NAND boot support using SPL framework. To boot from
NAND, either use DIP switches on board, or "qixis_reset nand"
command. Details of forming NAND image can be found in README.
Signed-off-by: NScott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: NYork Sun <yorksun@freescale.com>

This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: NScott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: NYork Sun <yorksun@freescale.com>

IFC has two register pages.Till IFC version 1.4 each
register page is 4KB each.But IFC ver 2.0 register page
size is 64KB each.IFC regiters structure is break into
two viz FCM and RUNTIME.FCM(Flash control machine) registers
are defined in PAGE0 and controls IFC generic functionality.
RUNTIME registers are defined in PAGE1 and controls NAND and
GPCM funcinality.

FCM and RUNTIME structures defination is common for IFC
version 1.4 and 2.0.
Signed-off-by: NJaiprakash Singh <b44839@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Add support of ethernet:
 - eth.c: mapping lane to slot for (0x2A, 0x07)
 - ls2085a.c: To enable/disable dpmac and get link type
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Acked-by: NMarek Vasut <marex@denx.de>

This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.

- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
  - for VF50, use PLL2 as memory clock (synchronous mode)
  - for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default

Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Acked-by: NStefan Agner <stefan@agner.ch>

Add architecture-specific u-boot.lds and remove all board-specific
u-boot.lds.

All the .text customization that was board-specific have been
moved inside the related include/configs, inside a
LDS_BOARD_TEXT define.
Signed-off-by: NAngelo Dureghello <angelo@sysam.it>

Implemented fb_set_reboot_flag() for OMAP5 to set
an environment variable 'dofastboot' when reboot-bootloader called.

This environment variable will be checked in boot command and fastboot
will be called if the variable is set.
If the bootcmd env variable of OMAP5 common is overwritten with board-specific
command, then these changes will not apply.

This was originally intended for DRA7 platform, but now applies to all OMAP5.

Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2cSigned-off-by: NAngela Stegmaier <angelabaker@ti.com>
Signed-off-by: NDileep Katta <dileep.katta@linaro.org>
Reviewed-by: NTom Rini <trini@konsulko.com>
[trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv()
in that case]
Signed-off-by: NTom Rini <trini@konsulko.com>

- Fastboot is enable by default for DRA7XX
        - This is based on following patch modified accordingly
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=b2e04f92b5d91c708b6fd6b79d2266966ac51f4bSigned-off-by: NAngela Stegmaier <angelabaker@ti.com>
Signed-off-by: NDileep Katta <dileep.katta@linaro.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

1. The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range
has been moved to 12..11.
2. add sleep bit support
Signed-off-by: NXiang Wang <wangx@marvell.com>
[robh: rebase to current mainline]
Signed-off-by: NRob Herring <robh@kernel.org>

Signed-off-by: NPeter Howard <phoward@gme.net.au>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: NTom Rini <trini@konsulko.com>

The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>

Wire rate IO Processor (WRIOP) provide support of receive and transmit
ethernet frames from the ethernet MAC.  Here Each WRIOP block supports
upto 64 DPMACs.

Create a house keeping data structure to support upto 16 DPMACs and
store external phy related information.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: NJ. German Rivera <German.Rivera@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Add support of SerDes framework for Layerscape Architecture.
    - Add support of 2 SerDes block
    - Add SerDes protocol parsing and detection
    - Create table of SerDes protocol supported by LS2085A
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>