- 15 5月, 2019 1 次提交
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由 Simon Goldschmidt 提交于
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused function 'reset_deassert_peripherals_handoff' that has been added from the beginning. As this is probably a result of copying the gen5 reset manager and this function has never been used, remove it. Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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- 06 5月, 2019 1 次提交
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由 Ang, Chee Hong 提交于
Software must never reset FPGA2SOC bridge. This bridge must only be reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software can cause the SoC to lock-up if there are traffics being drived into FPGA2SOC bridge. Signed-off-by: NAng, Chee Hong <chee.hong.ang@intel.com>
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- 18 4月, 2019 1 次提交
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由 Ley Foon Tan 提交于
Add helper function cpu_has_been_warmreset() to check if CPU is from warm reset boot. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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- 03 10月, 2018 1 次提交
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由 Ley Foon Tan 提交于
Remove code from the reset manager that is never called. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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- 18 5月, 2018 1 次提交
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由 Ley Foon Tan 提交于
Add Reset Manager driver support for Stratix SoC Signed-off-by: NChin Liang See <chin.liang.see@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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