Saving the environment leads to overwriting u-boot itself,
bricking boards.  Increase u-boot's image size so the environment
base address doesn't end up overlapping u-boot text.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The CONFIG_CMD_ENV option controls enablement of the `saveenv` command
rather than a generic "env" command, or anything else related to the
environment.  So, let's make sure the define is named accordingly.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Currently this is not creating any problem. But it will result
in compilation error when used as below.

printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2);
Signed-off-by: NSelvamuthukumar <selva.muthukumar@e-coninfotech.com>

continuation of the theme based on git grep "^#define CFG_.*;$" include/
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified.  Change to a positive value to allow
autobooting when a bootcmd is set.
Reported-by: NCoray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)
Signed-off-by: NBecky Bruce <becky.bruce@freescale.com>

this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Acked-by: NDave Liu <daveliu@freescale.com>

Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.

However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.

The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>

This patch makes the SATA clock as half of CSB clock.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.

Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.
Signed-off-by: NScott Wood <scottwood@freescale.com>

This is primarily for the early console support.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>

On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>

Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>

Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware.  Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

the dts file basenames were updated in linux - this helps avoid
inadvertently loading any old dtbs laying around.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
*	       TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
*		       load)
Signed-off-by: NKevin Lam <kevin.lam@freescale.com>
Signed-off-by: NJoe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Format the code, make it more readable
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Reduce the AL from 2 to 1 clock to improve the performance.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

clean up the cache config from configs.h of board
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

continuation of commit 37395fa2b0d9d617f28d44ca11592260ef16105a to 837x
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for 837x.
This change guarantees that the environment will be located on the
first flash sector after the U-Boot image.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: NDave Liu <daveliu@freescale.com>

Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards.  This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

and make some minor corrections to the FDT part of the README.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.

Signed-off-by Tony Li <tony.li@freescale.com>

Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.

Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Signed-off-by: NJon Loeliger <jdl@freescale.com>

Modifications to the existing code to support the new fdt command.

8360 and 832x weren't updating their [local-]mac-address
properties. This patch fixes that.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>