1. 09 8月, 2017 1 次提交
  2. 22 11月, 2016 1 次提交
    • T
      arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms · 983e3700
      Tom Rini 提交于
      This moves what was in arch/arm/cpu/armv7/omap-common in to
      arch/arm/mach-omap2 and moves
      arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
      as subdirectories.  All refernces to the former locations are updated to
      the current locations.  For the logic to decide what our outputs are,
      consolidate the tests into a single config.mk rather than including 4.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      983e3700
  3. 30 1月, 2015 1 次提交
  4. 18 4月, 2014 2 次提交
    • W
      ARM: OMAP: replace custom sr32() by standard I/O accessors · a88e55c4
      Wolfgang Denk 提交于
      Replace the custom bit manipulation function sr32() by standard I/O
      accessors.  A major motivation for this cleanup was the fact, that a
      number of calls of that function resulted in 32 bit wide shift
      operations on u32 data, which according to the C-ISO/IEC-9899-Standard
      provokes undefined behaviour:
      
      	6.5.7 Bitwise shift operators
      	...
              If the value of the right operand is negative or is greater
              than or equal to the width of the promoted left operand, the
              behavior is undefined.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
      a88e55c4
    • W
      ARM: OMAP: hide custom bit manipulation function sr32() · 4e468502
      Wolfgang Denk 提交于
      The only remaining user of the custom bit manipulation function sr32()
      is arch/arm/cpu/armv7/omap3/clock.c, so  make it a static function in
      that file to prepare complete removal.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
      4e468502
  5. 06 12月, 2013 1 次提交
    • M
      arm: omap3: Enable clocks for peripherals only if they are used · f33b9bd3
      Michael Trimarchi 提交于
      This patch change the per_clocks_enable() function used in OMAP3
      code to enable peripherals clocks. Only required clock should be
      activated. So if the board use the uart(x) as a console we need
      to activate it. The Board's config should include define to enable
      every subsystem that the board use. For a complete list
      of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
      should be checked.
      Right now the bootloader can enable and disable clocks for:
      uart(x) using CONFIG_SYS_NS16550
      gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
      i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.
      
      Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
      are not supported by any define.
      Their activation need to included in the per_clocks_enable if the
      peripheral is included. Not booting board should enable the peripheral
      clock connected to their driver
      Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Tom Rini <trini@ti.com>
      Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
      f33b9bd3
  6. 13 11月, 2013 1 次提交
    • H
      i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework · 6789e84e
      Heiko Schocher 提交于
      - add omap24xx driver to new multibus/multiadpater support
      - adapted all config files, which uses this driver
      
      Tested on the am335x based siemens boards rut, dxr2 and pxm2
      posted here:
      http://patchwork.ozlabs.org/patch/263211/Signed-off-by: NHeiko Schocher <hs@denx.de>
      Tested-by: NTom Rini <trini@ti.com>
      Cc: Lars Poeschel <poeschel@lemonage.de>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Tom Rix <Tom.Rix@windriver.com>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
      Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Ilya Yanok <yanok@emcraft.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Pali Rohár <pali.rohar@gmail.com>
      Cc: Peter Barada <peter.barada@logicpd.com>
      Cc: Nagendra T S  <nagendra@mistralsolutions.com>
      Cc: Michael Jones <michael.jones@matrix-vision.de>
      Cc: Raphael Assenat <raph@8d.com>
      Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
      Acked-by: NStefano Babic <sbabic@denx.de>
      6789e84e
  7. 28 8月, 2013 1 次提交
  8. 15 8月, 2013 1 次提交
    • N
      ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx... · a704a6d6
      Naumann Andreas 提交于
      ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx according to errata sprz318e.
      
      In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup.
      So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only.
      Also, the FSEL registers exist no longer, so removed them from init.
      
      Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel.
      Signed-off-by: NAndreas Naumann <anaumann@ultratronik.de>
      [trini: Add extern to <asm/arch-omap3/clock.h>
      Signed-off-by: NTom Rini <trini@ti.com>
      a704a6d6
  9. 24 7月, 2013 1 次提交
  10. 10 6月, 2013 1 次提交
  11. 15 5月, 2012 1 次提交
    • M
      arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx · a3c3fabb
      Matt Porter 提交于
      In warm reset conditions on OMAP36xx/AM/DM37xx the rom code
      incorrectly sets the DPLL4 clock input divider to /6.5 which
      is an invalid value unless the input clock is 13MHz. When a JTAG
      emulator is attached, a warm reset is necessary after the emulator
      gains control of the process. This results in a loss of serial
      output due to the invalid DPLL4 settings.
      
      This patch fixes the issue by resetting the DPLL4 clock input
      divider to /1 when the input clock is not 13MHz. AM/DM37x TRM
      section 3.5.3.3.3.2.1 specifies that the /6.5 setting is only
      used when the input clock is 13MHz.
      Signed-off-by: NMatt Porter <mporter@ti.com>
      a3c3fabb
  12. 12 2月, 2012 1 次提交
  13. 04 9月, 2011 3 次提交
  14. 28 4月, 2011 1 次提交
  15. 09 9月, 2010 1 次提交
  16. 06 7月, 2010 1 次提交
  17. 13 4月, 2010 1 次提交
  18. 13 2月, 2010 1 次提交
  19. 08 8月, 2009 1 次提交
  20. 13 6月, 2009 1 次提交
  21. 30 4月, 2009 1 次提交
  22. 25 1月, 2009 1 次提交