Use cfi flash driver model.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>

Convert cfi flash to driver model.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.

The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD uclass.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>

The latest Linux can directly handle SMP operations for UniPhier SoCs
without any help of U-boot.  Drop the relevant code from U-boot.

See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier:
rework SMP operations to use trampoline code") in Linux Kernel.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This makes USB3.0 available on new SoCs/boards.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The IRQ is not used in U-Boot, but this would be useful to sync
device trees between Linux and U-Boot.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Now that we have solved the problems that prevented this feature from
being enabled, enable it everywhere.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This sets up a fine-grained page table, which is a requirement for
noncached_init() to operate correctly.

MMU setup code currently exists in a number of places:
- A version in the core ARMv8 support code that sets up page tables that
use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't
support.
- Enhanced versions for fsl-lsch3 and zynmq that set up finer grained
page tables.

Ideally, rather than duplicating the MMU setup code yet again this patch
would instead consolidate all the different routines into the core ARMv8
code so that it supported all use-cases. However, this will require
significant effort since there appear to be a number of discrepancies[1]
between different versions of the code, and between the defines/values by
some copies of the MMU setup code use and the architectural MMU
documentation. Some reverse engineering will be required to determine the
intent of the current code.

[1] For example, in the core ARMv8 MMU setup code, three defines named
TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and
the others set a different field (T1SZ) in the page tables. As far as I
can tell so far, there should be no need to set different values per
exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't
be enabled anyway. Another example is inconsistent values for *_VA_BITS
between the current core ARMv8 MMU setup code and the various SoC-
specific MMU setup code. Another example is that asm/armv8/mmu.h's value
for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT;
research is needed to determine which code relies on which of those
values and why, and whether fixing the incorrect value will cause any
regression.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

In order for noncached_init() to operate correctly, SoCs must set up a
custom page table with fine-grained (2MiB) sections, which can be
configured from noncached_init().

This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c
by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There
are some other reasons for the duplication there though, such as enabling
icache early, and enabling dcaching earlier with a different configuration.

This change makes mmu_setup() a weak implementation, so that the MMU setup
code can be replaced without having to duplicate other code that calls it.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The implementation of noncached_init() uses define MMU_SECTION_SIZE.
Define this on ARM64.

Move the prototype of noncached_{init,alloc}() to a location that
doesn't depend on !defined(CONFIG_ARM64).

Note that noncached_init() calls mmu_set_region_dcache_behaviour() which
relies on something having set up translation tables with 2MB block size.
The core ARMv8 MMU setup code does not do this by default, but currently
relies on SoC specific MMU setup code. Be aware of this before enabling
this feature on your platform!
Signed-off-by: NStephen Warren <swarren@nvidia.com>

ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
in the MAINTAINERS file, so add them for completeness.
Reported-by: NAlbert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

A few config files have been added without updating MAINTAINERS.
Reported-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: NTom Rini <trini@konsulko.com>

Old sector number is not being cleared from FLASH_CR register. For example
when first erased sector was 001 and then you want to erase sector 010,
sector 011 gets erased instead.
This patch clears old sector number from FLASH_CR register before a new
one is written.
Signed-off-by: NVadzim Dambrouski <pftbest@gmail.com>

flash_lock call is inside a for loop, so after the first iteration flash
is locked and no more sectors can be erased.
Move flash_lock out of the loop.
Signed-off-by: NVadzim Dambrouski <pftbest@gmail.com>

In 522b021a we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
the mpc85xx linker scripts as this is not required and breaks newer
binutils.  This commit cleans up the rest of the powerpc linker scripts.
Signed-off-by: NTom Rini <trini@konsulko.com>

A few config files have been added without updating MAINTAINERS.
Reported-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: NTom Rini <trini@konsulko.com>

After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

Revert commit 7a2c1b13 which dropped OpenRD boards.
Assume maintainership of OpenRD.
Remove OpenRD from scrapyard.
Switch OpenRD to generic board.
Switch to Thumb build.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

Kirkwood files cpu.c and cache.c cannot build in Thumb state;
force them in ARM state even under CONFIG_SYS_THUMB_BUILD.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

The tricorder and tricorder_flash boards have grown too big.
Reduce their size by building them with CONFIG_SYS_THUMB_BUILD.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.

This patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the aforementioned
files.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

This target is ARMv7-M therefore can only build for Thumb,
but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot
code did not know it had to build for Thumb(2), not ARM.

This patch is binary-invariant: builds of stm32f429-discovery
with and without this patch were compared and found to differ
only by their U-Boot version strings.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

This patch fixes compile warnings like this:

warning: format '%lu' expects argument of type 'long unsigned int',
         but argument 5 has type 'size_t'

In C99 standard you can use %zu modifier to print size_t values.
Signed-off-by: NVadzim Dambrouski <pftbest@gmail.com>

If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile
error looking like this:

arch/arm/lib/semihosting.c: In function 'smh_read':
{standard input}: Assembler messages:
{standard input}:34: Error: invalid swi expression
{standard input}:34: Error: value of 1193046 too large for field of 2 bytes at 0
scripts/Makefile.build:277: recipe for target 'arch/arm/lib/semihosting.o' failed

The source of the problem is "svc #0x123456" instruction. This instruction
can not be encoded using Thumb2 instruction set used by ARMv7M CPUs.
ARM documentation suggests using "bkpt #0xAB" instruction instead [1].
This patch fixes compile errors and adds support for semihosting for
STM32F429 or any other ARMv7M target.
This change was sested on STM32F429-DISCOVERY board using OpenOCD and
"smhload" u-boot command.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjhiea.htmlSigned-off-by: NVadzim Dambrouski <pftbest@gmail.com>

In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in
u-boot.lds overrides the linker built-in symbols
(https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff;
h=b893397a4b1316610f49819344817715e4305de9),
so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the
.reloc section.

To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol
should not be defined in sections, and the symbols in linker generated .got
section should be used(https://sourceware.org/ml/binutils/2008-09/
msg00122.html)

Fixed the following build errors with binutils-2.25:
| powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in
linker created .got
Signed-off-by: NZhenhua Luo <zhenhua.luo@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>

A number of headers define functions as "extern inline" which is
causing problems with gcc5.  The reason is that starting with
version 5.1, gcc defaults to the standard C99 semantics for the
inline keyword.

Under the traditional GNU inline semantics, an "extern inline"
function would never create an external definition, the same
as inline *without* extern in C99.  In C99, and "extern inline"
definition is simply an external definition with an inline hint.
In short, the meanings of inline with and without extern are
swapped between GNU and C99.

The upshot is that all these definitions in header files create
an external definition wherever those headers are included,
resulting in multiple definition errors at link time.

Changing all these functions to "static inline" fixes the problem
since this works as desired in all gcc versions.  Although the
semantics are slightly different (a static inline definition may
result in an actual function being emitted), it works as intended
in practice.

This patch also removes extern prototype declarations for the
changed functions where they existed.
Signed-off-by: NMans Rullgard <mans@mansr.com>

This patch fix compilation error:
drivers/mmc/zynq_sdhci.c:16:5: error: conflicting types for
‘zynq_sdhci_init’
 int zynq_sdhci_init(phys_addr_t regbase)
     ^
In file included from drivers/mmc/zynq_sdhci.c:14:0:
./arch/arm/include/asm/arch/sys_proto.h:16:5: note: previous declaration
of ‘zynq_sdhci_init’ was here
 int zynq_sdhci_init(unsigned long regbase);
     ^
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The move to 'generic board' as well as changes in the generic
bootm code broke the boot of FIT uImage's. Especially uImage's
with additional initramfs images or FDT's do not work anymore.

Refactor the bootm code to work again with the generic bootm code.

Always relocate ramdisk and FDT in step 'bootm prep' because the
generic bootm code does this only for legacy uImage's.

Move the step 'bootm cmdline' to 'bootm prep' because the Linux
kernel parameters rd_start and rd_size have to be initialized after
the relocation of the ramdisk.

Furthermore support the step 'bootm fake'.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The variables bd_t:bi_memstart and bd_t:bi_memsize have to be
initialized also on MIPS. Otherwise LMB and cmd_bdinfo do not
correctly work. This currently breaks the booting of FIT images
on MIPS. Enable the board_init_f hook setup_board_part1()
for MIPS to fix this.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Get numbers of fdt address and size cells in altera_tse_probe(),
thereby remove the assumption of one address cell and one size
cell.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Replace numerical bit shift with BIT macro
in altera_tse

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NChin Liang See <clsee@altera.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Remove the useless parenthesis.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NChin Liang See <clsee@altera.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Fix packed and aligned attribute warnings.

WARNING: __packed is preferred over __attribute__((packed))
#14: FILE: drivers/net/altera_tse.h:14:
+#define __packed_1_    __attribute__ ((packed, aligned(1)))

WARNING: __aligned(size) is preferred over
__attribute__((aligned(size)))
#14: FILE: drivers/net/altera_tse.h:14:
+#define __packed_1_    __attribute__ ((packed, aligned(1)))
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NChin Liang See <clsee@altera.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Use data type u32/u16/u8 for regs and desc, as it is more
portable.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NChin Liang See <clsee@altera.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Remove unused macro and regs def.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NChin Liang See <clsee@altera.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Trim CONFIG_SYS_MEMTEST_END location.

CONFIG_SYS_MONITOR_LEN
  Reserving 256k for U-Boot at: d7fc0000
CONFIG_ENV_SIZE
CONFIG_SYS_MALLOC_LEN
  Reserving 256k for malloc() at: d7f80000
0x10000 for the rest
  Reserving 68 Bytes for Board Info at: d7f7ffbc
  Reserving 208 Bytes for Global Data at: d7f7feec
  Reserving 12000 Bytes for FDT at: d7f7d00c
  Stack
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>