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  1. 19 8月, 2014 3 次提交
    • S
      ARM: tegra: Use mem size from MC rather than ODMDATA · aeb3fcb3
      由 Stephen Warren 提交于 
      In at least Tegra124, the Tegra memory controller (MC) has a register
that controls the memory size. Read this to determine the memory size
rather than requiring this to be redundantly encoded into the ODMDATA.
This way, changes to the BCT (i.e. MC configuration) automatically
updated SW's view of the memory size, without requiring manual changes
to the ODMDATA.

Future work potentially required:
* Clip the memory size to architectural limits; U-Boot probably doesn't
  and won't support either LPAE or Tegra's "swiss cheese" memory layout,
  at least one of which would be required for >2GB RAM.
* Subtract out any carveout required by firmware on future SoCs.
Based-on-work-by: NTom Warren <twarren@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>
      aeb3fcb3
    • S
      ARM: tegra: enable DFU too · 39446bce
      由 Stephen Warren 提交于 
      Enable DFU protocol support (via the "dfu" command) on Tegra boards where
USB device/gadget mode is enabled.

Note that for DFU to operate correctly on Tegra, we still need some DFU
fixes/enhancements that are going through the DFU -> USB trees. However,
the code builds just fine without those changes, and applying this patch
now will allow both sets of patches to meet in the main U-Boot tree much
more quickly.

In order to run test/dfu/dfu_gadget_test.sh, you would need to add the
following to the board configuration:

CONFIG_EXT4_WRITE
CONFIG_CMD_EXT4_WRITE

However, I haven't enabled those here, since I believe the main use-case
for DFU on Tegra is raw flash writing, rather than filesystem access, so
we don't need the additional code-size hit. However, I could be persuaded
otherwise! We should probably add a separate test script for raw flash
access.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>
      39446bce
    • B
      ARM: tegra: Disable VPR · df3443df
      由 Bryan Wu 提交于 
      On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed.  For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed).

This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
in Chromium OS U-Boot project.
Signed-off-by: NAndrew Chew <achew@nvidia.com>
Signed-off-by: NJimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: NBryan Wu <pengw@nvidia.com>
[acourbot: ensure write went through, vpr.c style changes]
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>
      df3443df
  3. 09 8月, 2014 1 次提交
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  13. 31 7月, 2014 1 次提交