- 26 3月, 2008 19 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Jerry Van Baren 提交于
These defines embedded the u-boot env variables and/or the bd_t structure in the fdt blob. The conclusion of discussion on the u-boot email list was that embedding these in the fdt blob is not useful: there are better ways of passing the data (in fact, the fdt blob itself replaces the bd_t struct). The only board that enables these is the stxxtc and they don't appear to be used by linux. Signed-off-by: NGerald Van Baren <vanbaren@cideas.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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由 Kyungmin Park 提交于
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array using a NOR Flash interface. This on-chip integration enables system designers to reduce external system logic and use high-density NAND Flash in applications that would otherwise have to use more NOR components. Flex-OneNAND enables users to configure to partition it into SLC and MLC areas in more flexible way. While MLC area of Flex-OneNAND can be used to store data that require low reliability and high density, SLC area of Flex-OneNAND to store data that need high reliability and high performance. Flex-OneNAND can let users take advantage of storing these two different types of data into one chip, which is making Flex-OneNAND more cost- and space-effective. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 André Schwarz 提交于
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is defined. Systems without FEC, i.e. no FEC node in DTB, should be possible. Signed-off-by: NAndre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 goda.yusuke 提交于
AX88796L is device of NE2000 compatible. This patch support AX88796L ethernet device. Signed-off-by: NYusuke Goda <goda.yusuke@renesas.com> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 goda.yusuke 提交于
There are more devices of the NE2000 base. A present code is difficult for us to support more devices. To support more NE2000 clone devices, separated the function. Signed-off-by: NYusuke Goda <goda.yusuke@renesas.com> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Mike Frysinger 提交于
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board directory, but it is not board specific, so relocate it to the drivers dir so that other Blackfin ports can utilize it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Since the "ssync" instruction may have hardware anomalies associated with it, have the smc91111 driver use the SSYNC macro rather than invoking it directly. We workaround all the anomalies via this macro. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Bryan O'Donoghue 提交于
This patch does some shifting around of OF support on 8xx. Signed-off-by: NBryan O'Donoghue <bodonoghue@codehermit.ie>
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由 Kumar Gala 提交于
For historical reasons we limited the stack to 256M because some boards could only map that much via BATS. However newer boards are capable of mapping more memory (for example 85xx is capble of doing up to 2G). Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Bryan O'Donoghue 提交于
Signed-off-by: NBryan O'Donoghue <bodonoghue@codehermit.ie>
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由 Kumar Gala 提交于
Add a simple expr style command that will set an env variable as the result of the command. This allows us to do simple math in shell. The following operations are supported: &, |, ^, +, -, *, /. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 25 3月, 2008 19 次提交
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Shinya Kuribayashi 提交于
Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
You can't judge UNCACHED by Config.K0 LSB. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Handles machine specific functions by using weak functions. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Add setup_c0_status from Linux. For the moment we disable interrupts, set CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for reset-time configuration and will work well across most processors. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Without this change, we'll be suffering from deffered WATCH exception once Status.EXL is cleared. Make sure Cause.WP is cleared. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Move things to appropriate place. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you don't need to do Hit_Invalidate_I, but flush_cache() needs it since this function is used not only in U-Boot specfic programs but also at loading target binaries. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I again per a loop for I-cache initialization. But according to 'See MIPS Run', we're encouraged to use three separate loops rather than combining them *for both I- and D-cache*. This patch tries to fix this. In accordance with fixing above, mips_init_[id]cache are separated from mips_cache_reset(), and rewrite cache loops are completely rewritten with useful macros. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
This routine fills memory with zero by 64 bytes, and is 64-bit capable. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
This patch replaces the current function definitions with NESTED, LEAF and END macro. They specify some more additional information about the function; an alignment of symbol, type of symbol, stack frame usage, etc. These information explicitly tells the assembler and the debugger about the types of code we want to generate. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
Make some asm headers adjusted to the latest Linux kernel. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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由 Shinya Kuribayashi 提交于
The initial intension of having mips_cache_lock() was to use the cache as memory for temporary stack use so that a C environment can be set up as early as possible. But now mips_cache_lock() follow lowlevel_init(). We've already have the real memory initilaized at this point, therefore we could/should use it. No reason to lock at all. Other problems: Cache locking is not consistent across MIPS implementaions. Some imple- mentations don't support locking at all. The style of locking varies - some support per line locking, others per way, etc. Some parts use bits in status registers instead of cache ops. Current mips_cache_lock() is not necessarily general-purpose. And this is worthy of special mention; once U-Boot/MIPS locks the lines, they are never get unlocked, so the code relies on whatever gets loaded after U-Boot to re-initialize the cache and clear the locks. We're sup- posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented, but leave the situation as it is for a long time. For these reasons, I proposed the removal of mips_cache_lock() from the global start-up code. This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that *things have changed*. If he wants the same behavior as before, he needs to have CFG_INIT_RAM_LOCK_MIPS in his config file. If we don't have any regression report through several releases, then we'll remove codes entirely. Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp> Acked-by: NAndrew Dyer <amdyer@gmail.com>
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由 Yuri Tikhonov 提交于
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be run on the board, then the SYSMON POST controls the display backlight (doesn't switch backlight ON if POST FAILED, and does switch the backlight ON if PASSED). If not, then the video driver controls the display backlight (just switch ON the backlight upon initialization). Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
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由 Yuri Tikhonov 提交于
Fix errors in the LWMON5 Sysmon POST for negative temperatures. Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
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由 Wolfgang Denk 提交于
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- 23 3月, 2008 2 次提交
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由 Nobuhiro Iwamatsu 提交于
In current source code, when the device number of PCI is 0, process PCI bridge without fail. However, when the device number is 0, it is not PCI always bridge. There are times when device of PCI allocates. When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when use this patch. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NStefan Roese <sr@denx.de>
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