- 12 12月, 2014 20 次提交
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由 Tang Yuantian 提交于
With the introducing of generic board and ARM-based cores, current deep sleep framework doesn't work anymore. This patch will convert the current framework to adapt this change. Basically it does: 1. Converts all the Freescale's DDR driver to support deep sleep. 2. Added basic framework support for ARM-based and PPC-based cores separately. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Nikhil Badola 提交于
Check USB Erratum A007792 applicability. If applicable, add corresponding property in the device tree via device tree fixup Signed-off-by: NNikhil Badola <nikhil.badola@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Nikhil Badola 提交于
Add a new framework for fsl usb erratum handling to standardize erratum checking only inside Uboot. Information to kernel is passed via a boolean property corresponding to erratum, hence eliminating need for code duplication inside kernel Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: NNikhil Badola <nikhil.badola@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Nikhil Badola 提交于
move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/" so that it works independent of architecture it is running on Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: NNikhil Badola <nikhil.badola@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yao Yuan 提交于
The Freescale LS1021AQDS share some pins, so Add the hwconfig option that allows the user to choose which the function he wants. The main pin mux IP is: eSDHC, SAI, IIC2, RGMII, CAN, SAI. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds NAND boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from NAND flash to DDR, finally SPL transfer control to u-boot. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds QSPI boot support for LS1021AQDS/TWR board. The QSPI boot image need to be programmed into the QSPI flash first. Then the booting will start from QSPI memory space. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
The SD/NAND/QSPI boot definations are wrong for QE support, this patch is to fix this error. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch will fix the bug that the partitions on the SD card could not be accessed and add the support for the FAT fs. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds SD boot support for LS1021ATWR board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from SD card to DDR, finally SPL transfer control to u-boot. Signed-off-by: NChen Lu <chen.lu@freescale.com> Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NJason Jin <jason.jin@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds SD boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from SD card to DDR, finally SPL transfer control to u-boot. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NJason Jin <jason.jin@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
Through adding CONFIG_QIXIS_I2C_ACCESS macro, QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used for both i2c and ifc access to QIXIS FPGA. This is more convenient for coding. Signed-off-by: NJason Jin <jason.jin@freescale.com> Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
Add SUPPORT_SPL feature for SD and NAND boot on LS1021AQDS and LS1021ATWR. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
On LS1, DDR is initialized by reading SPD through I2C interface in SPL code. For I2C, ll_entry_count() is called, and it returns the number of elements of a linker-generated array placed into subsection of .u_boot_list section specified by _list argument. So add I2C linker list in the generic .lds to fix the issue about using I2C in SPL. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
In SD boot, the magic number of u-boot image will be checked. For LS102xA, u-boot.bin doesn't have the magic number. So use u-boot.img which includes the magic number instead of u-boot.bin when producing u-boot-with-spl-pbl.bin. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
For LS102xA, the size of spl/u-boot-spl.bin is variable. This patch adds the support to deal with the variable u-boot size in pblimage tool. It will be padded to 64 byte boundary. Use pblimage_check_params() to add the specific operations for ARM, such as PBI CRC and END command and the calculation of pbl_cmd_initaddr. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Chenhui Zhao 提交于
When resuming from deep sleep, the I2C channel may not be in the default channel. So, switch to the default channel before accessing DDR SPD. Signed-off-by: NChenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Minghuan Lian 提交于
The patch changes PCIe dts node status to 'disabled' if the corresponding controller is disabled according to serdes protocol. Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 chenhui zhao 提交于
After wakeup from deep sleep, Clear EPU registers as early as possible to prevent from possible issue. It's also safe to clear at normal boot. Signed-off-by: NChenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Tang Yuantian 提交于
The bus frequency in SOC node should be clock frequency of platform. That is not true if it is devided by 2. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 09 12月, 2014 5 次提交
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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- 08 12月, 2014 15 次提交
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由 Masahiro Yamada 提交于
Some UniPhier boards are equipped with an expansion slot that some optional SRAM/NOR-flash cards can be attached to. So, run-time detection of the number of flash banks would be more user-friendly. Until this commit, UniPhier boards have achieved this by (ab)using board_flash_wp_on() because the boot failed if flash_size got zero. Fortunately, this problem was solved by commit 70879a92 (flash: do not fail even if flash_size is zero). Now it is possible to throw away such a tricky workaround. This commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further refactoring. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only) 0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only) Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Add I2C controller and NAND controller devices. Fix indentation too. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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由 Peter Kümmel 提交于
Warning: In file included from scripts/kconfig/zconf.tab.c:2537:0: scripts/kconfig/menu.c: In function ‘get_symbol_str’: scripts/kconfig/menu.c:590:18: warning: ‘jump’ may be used uninitialized in this function [-Wmaybe-uninitialized] jump->offset = strlen(r->s); Simplifies the test logic because (head && local) means (jump != 0) and makes GCC happy when checking if the jump pointer was initialized. Signed-off-by: NPeter Kümmel <syntheticpp@gmx.net> Signed-off-by: NMichal Marek <mmarek@suse.cz> [ imported from Linux Kernel, commit 2d5603060967 ] Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Suriyan Ramasami 提交于
The boot commands - bootz/bootm mandate a third argument which is the address to the FDT blob. In cases where this argument is not specified, boot fails with a message indicating a missing FDT. This causes non-FDT kernels to fail to boot. This patch allows both FDT and non-FDT kernels to boot by making the third parameter to the bootm/bootz optional. Signed-off-by: NSuriyan Ramasami <suriyan.r@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org> [trini: Update again for covering appended DTB case after last revert in this area] Signed-off-by: NTom Rini <trini@ti.com>
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由 Masahiro Yamada 提交于
The macro __iomem is defined in include/linux/compiler.h. Let's include it rather than double __iomem defines. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.adi@gmail.com>
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由 Masahiro Yamada 提交于
__user and __iomem are defined in include/linux/compiler.h. MAX_ERRNO is defined in include/linux/err.h. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Including <linux/compiler.h> is enough for general use. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Daniel Schwierzeck 提交于
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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