Add NAND support for Compulab CM-FX6 CoM.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Add initial support for Compulab CM-FX6 CoM.
Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Define get_cpu_type(). Reuse it in is_cpu_type().

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Current way of calculation CS0_END field for MMDCx_MDASP register
is problematic because in most cases the user is forced to define
cs_density in an unnatural way: as value - 2, instead of value.

This breaks the abstraction provided by struct mx6_ddr_sysinfo
because the user is forced to be aware of the way the calculation
is performed.

Refactor the calculation.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

According to MX6 TRM, both MMDC and DRAM should be configured to
the same powerdown precharge. Currently, mx6_dram_cfg()
configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
'slow exit (DLL off)' (MR0[12] = 0).

Configure MMDC for slow pd.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Acked-by: NTim Harvey <tharvey@gateworks.com>

Bit 16 in mapsr register is in a reserved field. Don't write to it.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

No functional changes.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Add macro which defines i2c_pads_info structs for multiple SoC types,
and a macro which selects the appropriate struct based on CPU type,
thus eliminating the need to manage multiple i2c pad configurations
manually when supporting multiple SoC types.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Define the new common function sata_port_status() which can be
used to query the sata driver for the state of ports, and implement it
for dwc_ahsata.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM
module what I2C bus the EEPROM is located at. Make cl_eeprom_read()
switch to that bus when reading EEPROM.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Acked-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Add functions to enable/disable clocks for UART, SPI, ENET, and MMC.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

There are many similarities between the IMX6QUAD/IMX6DUAL and there are
many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env
variable that tells you which type you have.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>

The GW5520 has an IMX6Q SoC with 512MB of DDR3, 256MB of NAND flash as well as:
 * 2x MiniPCIe sockets
 * 2x USB host sockets
 * 2x i210 GigE
 * HDMI out
 * digital I/O expansion
Signed-off-by: NTim Harvey <tharvey@gateworks.com>

The IMX6 MMDC calibration registers depend on propagation delay and capacitive
loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the
board layout varies little in trace-lengths such that propagation delays are
irrelevant thus we can simply things by using calibration values obtained
from various board layouts based on a common SoC and DDR chip configuration.

This eliminates board-model from being needed allowing more flexibility. These
values were tested on a large sample size of Gateworks Ventana boards ranging
in layout, and memory configuration over the entire temperature range supported.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>

Signed-off-by: NTim Harvey <tharvey@gateworks.com>

When testing the FEC driver on a mx6solox we noticed that the TDAR bit gets
always cleared prior then the READY bit is cleared in the last BD, which causes
FEC packets reception to always fail.

As explained by Ye Li:

"The TDAR bit is cleared when the descriptors are all out from TX ring, but on
mx6solox we noticed that the READY bit is still not cleared right after TDAR.
These are two distinct signals, and in IC simulation, we found that TDAR always
gets cleared prior than the READY bit of last BD becomes cleared.
In mx6solox, we use a later version of FEC IP. It looks like that this
intrinsic behaviour of TDAR bit has changed in this newer FEC version."

Fix this by polling the READY bit of BD after the TDAR polling, which covers the
mx6solox case and does not harm the other SoCs.

No performance drop has been noticed with this patch applied when testing TFTP
transfers on several boards of different i.mx SoCs.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NMarek Vasut <marex@denx.de>

mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.

Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
which addresses the needs from mx6solox and also works for the other SoCs.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NMarek Vasut <marex@denx.de>

Enable drivers for FIMD, DP and parade bridge chip.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch adds DT properties for fimd and the parade bridge chip
present on peach_pit. The panel supports 1366x768 resolution.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Add initialization code for peach_pit panel, parade bridge chip,
and backlight.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch adds missing declaration for gpio_direction_input
function, thereby helps in resolving compilation warnings.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

The initialization table comes from the "Illustration of I2C command
for initialing PS8625" document supplied by Parade.
Signed-off-by: NVadim Bendebury <vbendeb@chromium.org>
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

On Exynos5420 and newer versions, the FIMD sysmmus are in
"on state" by default.
We have to disable them in order to make FIMD DMA work.
This patch adds the required framework to exynos_fimd driver,
and disables FIMD sysmmu on Exynos5420.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420 needed by
exynos video driver.
Also, configure ACLK_400_DISP1 as the parent for MUX_ACLK_400_DISP1_SUB_SEL.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

RPLL is needed to drive the LCD panel on Exynos5420 based boards.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Previously, we used to statically assign values for vl_col, vl_row and
vl_bpix using #defines like LCD_XRES, LCD_YRES and LCD_COLOR16.

Introducing the function exynos_lcd_early_init() would take care of this
assignment on the fly by parsing FIMD DT properties, thereby allowing us
to remove LCD_XRES and LCD_YRES from the main config file.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch adds support for Olimex A20-OLinuXino-LIME board.
Signed-off-by: NFUKAUMI Naoki <naobsd@gmail.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Patch is the result of:
  sed -i -e 's/FTDFILE/FDTFILE/g' board/sunxi/Kconfig configs/* include/configs/sunxi-common.h
  sed -i -e 's/ftdfile/fdtfile/g' board/sunxi/Kconfig
Reported-by: NVagrant Cascadian <vagrant@debian.org>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Acked-by: NHans de Goede <hdegoede@redhat.com>
[ ijc -- s/Spotted-by/Reported-by/ and resolve conflict vs "remove
         redundant "SPL" from CONFIG_SYS_EXTRA_OPTIONS" ]

CONFIG_SPL is defined as a primary option in Kconfig.
It should not be added to CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This patch changes MPLL from 800MHz to 880MHz on Odroid.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Inderpal's email address is not working any more.
Chander will be a new maintainer.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This config is valid for two devices:
- Odroid X2,
- Odroid U3.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This is a standard description for Odroid boards.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This change adds setup of environmental board info using
get_board_name() and get_board_type() functions for config
CONFIG_BOARD_TYPES.

This is useful in case of running many boards with just one config.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This change adds declaration of functions:
- set_board_type() - called at board_early_init_f()
- get_board_type() - called at checkboard()

For supporting multiple board types in a one config - it is welcome
to display the current board model. This is what get_board_type()
should return.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>

Changes v4:
- arch/arm/reset: fix weak function attribute to proper style
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This change enable automatic setting of dfu alt info
on every boot. This is useful in case of booting one
u-boot binary from multiple media.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>