- 13 5月, 2015 1 次提交
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由 Joe Hershberger 提交于
By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
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- 09 4月, 2015 2 次提交
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由 Andrej Rosano 提交于
Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. http://inversepath.com/usbarmorySigned-off-by: NAndrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Chris Kuethe <chris.kuethe@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-By: NVagrant Cascadian <vagrant@debian.org> Tested-by: NChris Kuethe <chris.kuethe@gmail.com>
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由 Andrej Rosano 提交于
Move the MX5 based boards to arch/arm/cpu/armv7/mx5, following the commit: 89ebc821Signed-off-by: NAndrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-by: NChris Kuethe <chris.kuethe@gmail.com>
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- 20 11月, 2014 1 次提交
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由 Fabio Estevam 提交于
Move MX5 specific set_chipselect_size function into generic i.MX part, such that MX6 based boards are able to use this function as well. While doing this the iomuxc gpr member needed to be consolidated between MX5 and MX6. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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- 29 3月, 2014 1 次提交
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由 Masahiro Yamada 提交于
U-Boot has supported two kinds of asm-offsets.h. One is generic for all architectures and its source is located at ./lib/asm-offsets.c. The other is SoC specific and its source is under SoC directory. The problem here is that only boards with SoC directory can use the asm-offsets infrastructure. Putting asm-offsets.c right under CPU directory does not work. Now a new demand is coming. PowerPC folks want to use asm-offsets. But no PowerPC boards have SoC directory. It seems inconsistent that some boards add asm-offsets.c to SoC directoreis and some to CPU directories. It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib. This commit merges asm-offsets.c under SoC directories into arch/$(ARCH)/lib/asm-offsets.c. By the way, I doubt the necessity of some entries in asm-offsets.c. I am leaving refactoring to the board maintainers. Please check "TODO" in the comment blocks in arch/{arm,nds32}/lib/asm-offsets.c. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
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- 03 1月, 2014 1 次提交
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由 Sergey Alyoshin 提交于
Enable fuse supply before fuse programming and disable after. Signed-off-by: NSergey Alyoshin <alyoshin.s@gmail.com> Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
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- 01 11月, 2013 3 次提交
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由 Fabio Estevam 提交于
setup_wdog macro is not used anywhere, so just remove it. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
Enable L2 cache for improving the system performance. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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- 17 10月, 2013 1 次提交
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由 trem 提交于
Signed-off-by: NPhilippe Reynes <tremyfr@yahoo.fr>
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- 15 10月, 2013 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: NTom Rini <trini@ti.com>
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- 27 8月, 2013 1 次提交
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由 Fabio Estevam 提交于
The 'enable' argument can be better expressed as boolean. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NOtavio Salvador <otavio@ossystems.com.br>
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- 24 7月, 2013 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: NTom Rini <trini@ti.com>
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- 05 5月, 2013 2 次提交
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由 Benoît Thébaudeau 提交于
Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
Augment the MX5 clock code with function to enable and configure NFC clock. This is necessary to get NFC working on MX5. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
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- 26 4月, 2013 1 次提交
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由 Fabio Estevam 提交于
When booting a FSL kernel based on 2.6.35 it is necessary to pass the revision tag to the kernel. Place a common weak function into soc.c for such purpose. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de>
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- 12 4月, 2013 1 次提交
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由 Benoît Thébaudeau 提交于
Don't use several instructions to build constant values. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: NStefano Babic <sbabic@denx.de>
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- 19 11月, 2012 2 次提交
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由 Benoît Thébaudeau 提交于
The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
Print CSPI clock in 'clock' command. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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- 26 10月, 2012 1 次提交
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由 Stefano Babic 提交于
Patch fix warnings compiling with ELDK-4.2: clock.c: In function 'get_standard_pll_sel_clk': clock.c:341: warning: 'freq' may be used uninitialized in this function Reported-by : Marek Vasut <marex@denx.de> Signed-off-by: NStefano Babic <sbabic@denx.de>
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- 18 10月, 2012 3 次提交
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由 Fabio Estevam 提交于
Add the software workaround for ARM erratum ID 468414. According to mx53/mx51 errata document: "ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a subsequent request Description: Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded to a subsequent, unrelated memory request. The conditions are as follows: • Neon loads and stores must be in use • Neon L1 caching must be disabled • Trustzone must be configured and in use • The secure memory address space and the non-secure memory address space both use the same physical addresses, either as an alias or the same memory location or for separate memory locations The issue is reported by ARM, erratum ID 468414, Category 2" Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz. Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz instead. Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI at 1080p because the IPU clock cannot reach the requested frequency. Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its maximum frequency. Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little bit to allow easier comparison with the original clock setup from FSL U-boot. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
init_clock is currently shared between mx51 and mx53 and it contains lots of ifdef's which makes it really hard to follow the code. Split the init_clock between mx51 and mx53 to allow easier readability. No functional changes are made. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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- 16 10月, 2012 16 次提交
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由 Benoît Thébaudeau 提交于
Optimize mx5 lowlevel_init.S code size: - Compute values at compile time rather than at runtime where possible. - Assign r4 to hold the zero value rather than setting registers to 0 again and again. - Associate a function to setup_pll rather than expanding its large macro code multiple times. - Allocate constant values in section only if used. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: NStefano Babic <sbabic@denx.de> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
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由 Benoît Thébaudeau 提交于
There are only 2 I²C instances on i.MX51, but 3 on i.MX53. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
The FEC clock does not come from PLL1, but from the IPG clock. The previous code was even inconsistent with itself, returning the IPG clock as expected for imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK). Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
The code handling the dividers was duplicated for each possible input clock, and this function can benefit from the newly introduced get_standard_pll_sel_clk() function instead of duplicating this mux handling code. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
This function returned 66500000 instead of the correct lp_apm clock frequency if the CCM.CSCMR1.uart_clk_sel mux is set to 3. This patch fixes this issue by introducing the get_standard_pll_sel_clk() function that will be used by future patches to handle identical muxes used by many other clocks. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
This fixes the "IPG PERCLK" frequency printed by the clocks command. The issue was that get_ipg_per_clk() used periph_clk instead of lp_apm in the case CCM.CBCMR.perclk_lp_apm_sel is set. It also fixes I²C support. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
In the case periph_clk comes from periph_apm_clk, the latter is selected by the CCM.CBCMR.periph_apm_sel mux, which can source the lp_apm clock from its input ♯2. get_periph_clk() returned 0 instead of the lp_apm clock frequency in this case. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024. In that case: - on i.MX51, this clock comes from the output of the FPM, - on i.MX53, this clock comes from the output of PLL4. This patch fixes the code accordingly. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks have different clock gate control bit-fields. The existing code was correct only for i.MX53, so this patch fixes the i.MX51 use case. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Jana Rapava <fermata7@gmail.com> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il>
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由 Benoît Thébaudeau 提交于
The clock gate values are 2-bit bit-fields. Hence, setting or clearing only one of these bits like what was done is wrong and can lead to unpredictable behavior depending on the original value of these bit-fields. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
Use clock gate definitions having names showing clearly the gated clock instead of names giving only a register field index. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
Clean up the i.MX5 clock driver: - Use readl() and writel() instead of their __raw_ counterparts. - Use the clr/setbits_le32() family of macros rather than expanding code. - Use accessor macros for bit-fields instead of _MASK and _OFFSET. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Benoît Thébaudeau 提交于
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of duplicated definitions. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Matthias Weisser 提交于
i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using MXC_I2C_CLK on all imx systems using i2c. Signed-off-by: NMatthias Weisser <weisserm@arcor.de> Acked-by: NStefano Babic <sbabic@denx.de>
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- 01 9月, 2012 1 次提交
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由 Troy Kisky 提交于
This is useful for forcing the ROM's usb downloader to activate upon a watchdog reset. Or, you can boot from either SD Card. Currently, support added for MX53 and MX6Q Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Note: MX53 support untested. Acked-by: NStefano Babic <sbabic@denx.de>
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