Add serial boot support
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

Place FEC pin assignments in cpu_init.c from platform's
mii.c
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>

This removes in nand.h code that is verbatim duplicated from bbm.h,
including directly bbm.h in nand.h. The previous state of affairs
prevented compiling code for a board hosting both NAND and OneNAND chips.
Reported-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Reported-by: NAlessandro Rubini <rubini-list@gnudd.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
Singed-off-by: NJason Jin <Jason.Jin@freescale.com>
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

CONFIG_ENV_ADDR should be (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE).
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

This patch fixes a problem on systems where the NOR flash is attached
to a 64 bit bus.  The toggle bit detection in flash_toggle() is based
on the assumption that the same flash address is read twice without
any other interjacent flash accesses.  However, on 32 bit systems the
function flash_read64() [as currently implemented] does not perform
an atomic 64 bit read - instead, this is broken down into two 32 bit
read accesses on addresses "addr" and "addr + 4".  So instead of
reading a 64 bit value twice from "addr", we see a sequence of 4 32
bit reads from "addr", "addr + 4", "addr", and "addr + 4".  The
consequence is that flash_toggle() fails to work.

This patch implements a simple, but somewhat ugly solution, as it
avoids the use of flash_read64() in this critical place (by breaking
it down manually into 32 bit read operations) instead of rewriting
flash_read64() such to perform atomic 64 bit reads as one could
expect.  However, such a rewrite would require the use of floating
point load operations, which becomes pretty complex:

	save MSR;
	set Floating Point Enable bit in MSR;
	use "lfd" instruction to perform atomic 64 bit read;
	use "stfd" to store value to temporary variable on stack;
	load u64 value from temporary variable;
	restore saved MSR;
	return u64 value;

The benefit-cost ratio of such an implementation was considered too
bad to actually attempt this, especially as we can expect that such
an implementation would not only have a bigger memory footprint but
also cause a performance degradation.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

This patch brings PMC440 board support up to date:

- fix GPIO configuration
- add misc_init_f()
- use better values for usbact variable
- fix USB 2.0 phy reset sequence
- shrink BAR2 to save PCI address space
- add FDT support
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

This patch fixes the PMC440 BSP commands painit and selfreset
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

This patch fixes esd's loadpci command when not all
memory on adapter boards is accessable via PCI.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

-Codingstyle cleanup
-Remove unused GPIO define
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Xilinx ppc440 and ppc405 have many similarities. This patch merge the
config files of both infrastuctures
Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: NStefan Roese <sr@denx.de>

Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
pin multiplexing correctly
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>

There's currently an off-by-one bug in fdt_subnode_offset_namelen()
which causes it to keep searching after it's finished the subnodes of
the given parent, and into the subnodes of siblings of the original
node which come after it in the tree.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry
(16 bytes), so make sure that fdt_resize at least adds that much
padding, no matter what the location or size of the fdt is.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NAndy Fleming <afleming@freescale.com>

The patch is following the commit 39243840

mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: NNick Spence <nick.spence@freescale.com>

also, the r2 is used as global data pointer.
Signed-off-by: NDave Liu <daveliu@freescale.com>

The current calculation will fail to cover all memory if
its size is not a power of two.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>