- 06 11月, 2020 4 次提交
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由 Simon Glass 提交于
It is useful for this command to show the address of the interrupt table. Add support for this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present these tables do not have the correct header, and there is an occasional incorrect value due to uninited data. Fix these bugs. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present these functions are incorrect. Fix them and add some logging and checking to avoid future problems. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present all tables are placed starting at address f0000 in memory, and can be up to 64KB in size. If the tables are very large, this may not provide enough space. Also if the tables point to other tables (such as console log or a ramoops area) then we must allocate other memory anyway. The bloblist is a nice place to put these tables since it is contiguous, which makes it easy to reserve this memory for linux using the 820 tables. Add an option to put some of the tables in the bloblist. For SMBIOS and ACPI, create suitable pointers from the f0000 region to the new location of the tables. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> [bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/ 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/] Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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- 05 11月, 2020 14 次提交
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由 Simon Glass 提交于
Use if() to remove the extra build path in this code. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This is required by Chrome OS so that the audio and other unibuild features work correctly. Add it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
These settings are included twice. The second lot are correct, so drop the others. Signed-off-by: NSimon Glass <sjg@chromium.org> Reported-by: NWolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The bloblist guarantees that blobs are zeroed so there is no need to do an additional memset(). Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present we create the ACPI context but then drop it after generation of tables is complete. This is annoying because we have to then search for tables later. To fix this, allocate the context and store it in global_data. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present write_tables() can fail but does not report this problem to its caller. Fix this by changing the return type. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Some boards need to include binary data into the image for use during the boot process. Add a node for these. An example is the audio-codec configuration used by some audio drivers on Intel platforms. If no private files are provided, they will be omitted. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add definitions for part of the vboot context used with verified boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Set up MSRs required for Apollo Lake. This enables Linux to use the timers correctly. Also write the fixed MSRs for this platform. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This file can be included by any header but it includes C code. Guard it to avoid errors when compiling ASL, etc. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Christian Gmeiner 提交于
If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc5-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Christian Gmeiner 提交于
Add a very simple API to be able to access SMBIOS strings like vendor, model and bios version. Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present there are a lot of dtoc warnings reported when building chromebook_coral, of the form: WARNING: the driver intel_apl_lpc was not found in the driver list Correct these by using driver names that matches their compatible string. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Fix the dtoc warning in these file by using a driver name that matches the compatible string. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 04 11月, 2020 1 次提交
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由 Michal Simek 提交于
CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be able to use compile-time checks to reduce the number of build paths. Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 03 11月, 2020 1 次提交
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由 Heiko Schocher 提交于
Michael wrote: commit 92765f45 ("env: Access Environment in SPI flashes before relocation") at least breaks the Kontron sl28 board. I guess it also breaks others which use a (late) SPI environment. reason is, that env_init() sets the init bit, if there is no init function defined in an environment driver, and use default return value -ENOENT in this case later for setting the default environment. Change: Environment driver can now implement an init function and return, if this function does nothing, simply -ENOENT. env_init() now handles -ENOENT correct by setting the inited bit for the environment driver. And if there is no other environment driver whose init function returns 0, load than the default environment. This prevents that each environment driver needs to set the default environment. Fixes: 92765f45 ("env: Access Environment in SPI flashes before relocation") Reported-by: NMichael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> [For the SF environment] Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 02 11月, 2020 10 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel由 Tom Rini 提交于
First set of u-boot-atmel fixes for 2021.01 cycle: This specific feature set includes the patches for DT required to fix the warnings for newer DTC version (1.6.0+), i2c and spi bus unit address.
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Eugen Hristev 提交于
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32" Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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- 01 11月, 2020 1 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for efi-2021-01-rc2 (2) The series contains the following enhancements * preparatory patches for UEFI capsule updates * initialization of the emulated RTC using an environment variable and a bug fix * If DisconnectController() is called for a child controller that is the only child of the driver, the driver must be disconnected.
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- 31 10月, 2020 4 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- New PX30 board: Engicam PX30.Core; - Fix USB HID support for rock960; - Remove host endianness dependency for rockchip mkimage; - dts update for rk3288-tinker; - Enable console MUX for some ROCKPi boards; - Add config-based ddr selection for px30;
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https://gitlab.denx.de/u-boot/custodians/u-boot-dm由 Tom Rini 提交于
of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
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由 Heinrich Schuchardt 提交于
The name of structure element logl_prev is not matched by the documentation. %s/logl_pref/logl_prev/ Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Tom Rini 提交于
- Additional log improvements - SPI flash environment improvements
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- 30 10月, 2020 5 次提交
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由 Jagan Teki 提交于
This would be useful and recommended boot flow for new boards which has doesn't have the DDR support yet in mainline. Sometimes it is very useful for debugging mainline DDR support. Documen it for px30 boot flow. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Signed-off-by: NSuniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose carrier board with capacitive touch interface. Genaral features: - TFT 10.1" industrial, 1280x800 LVDS display - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector SOM's like PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Signed-off-by: NSuniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
The existing common code for Engicam boards uses i.MX6, so attach that into i.MX6 Engicam boards so-that adding new SoC variants of Engicam boards become meaningful. Add support for it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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