Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.

Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)

Not included:
- Keyboard
- Display
- Sound
- USB
- TPM

Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add some U-Boot-specific settings. These should really go in the
*u-boot.dtsi file, but it seems that rk3399 does not use that yet.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.

Also adjust the enum name to lower case.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Some boards use different stdio environment variables from the default.
Provide a #define for this which can be set before including the header
file.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

These board files have inconsistent #include ordering. Fix them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

These clocks are needed to get MMC running. We don't actually support
setting them yet.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This memory is used on Bob. Add settings for this, taken from coreboot.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The u-boot,spl-boot-device property only allows MMC at present. Add SPI as
well for boards that boot from SPI flash.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

We use every second block when creating a SPI image, so update the text to
say this explicitly.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add mention of a prerequisite needed to build the image. Also adjust the
English wording in a few places.

Ideally this should move to using binman to produce images, and avoid the
manual steps.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This file has changed upstream, with some additions and changes. Move the
U-Boot version towards this.

Some USB changes seem to be incompatible with how the bindings work on
rockchip in U-Boot. Testing is needed to make sure that USB still works
correct, and adjust the code (not device tree) if not.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Bring in these files from Linux v4.20.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Quite a wide range of Rockchip SoCs are supported in mainline U-Boot now,
so drop the comment about needing to add more.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

At present some Rockchip SoCs and boards are not mentioned in the README.
So that people can see which SoCs are supported, expand the list to
include everything.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

In space-constrained environments or before driver model is available, it
is sometimes necessary to set GPIO values. Add an SPL API for this, to
allow early board code to change GPIOs. The caller must provide the
register address, so that the drivers can be fairly generic.

This API can be implemented by GPIO drivers, behind a suitable guard,
like #ifdef CONFIG_SPL_BUILD.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command
values. These are pretty generic names. Add a 'C' suffix to avoid possible
conflicts.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

It is helpful to print the clock number as well as the index, so that this
can be looked up in the binding file. Update the debug() statement to do
this.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

At present this function uses printf() format strings that are not
supported in SPL, so the output just consists of %llx strings on 64-bit.
machines. Fix this by adding a special case.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

To match the iomux setting of uart2 at SPL, correct the uart2
default pin configuration, if not changed, the evb-rk3229 can't
output the log message.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

If we used the pinctrl-rockchip driver, these code is not needed,
so remove them.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

If we used the pinctrl-rockchip driver, these config is not needed,
so remove them.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
and enable SPL_OF_LIBFDT to make FDT be built in.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

If we use the new pinctrl driver, the pinctrl setup will be done
by device probe. Remove the pinctrl setup at rk3288-board-spl.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

It seems that pinctrl is not requested for rk3188 SPL, remove it so
that can save more space for SPL image size.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

When the boot ROM sets up MMC we don't need to do it again. Remove the
MMC setup code entirely, but we also need to enable uart for debug message.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
to make FDT be built in.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This adds support for the ASUS C201, a RK3288-based clamshell
device. The device tree comes from linus's linux tree at
3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
are for 4GB Samsung LPDDR3, decoded from coreboot's
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc
Signed-off-by: NMarty E. Plummer <hanetzer@startmail.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Like on rk3399-puma we want to continue booting the fill U-Boot from
the same device as the SPL stage.
Signed-off-by: NMark Kettenis <kettenis@openbsd.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This function causes a 5-second delay and stops the display working on
minnie. This code should be in a driver and should only be enabled by
a device-tree property, so that it does not affect devices which do not
have this feature.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Jerry uses a max98090 audio codec and the internal SoC I2S peripheral.
Enable sound support and add the required device-tree pieces.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add a sound driver for rk3288 supporting chromebook_jerry. This uses the
I2S driver, and existing audio codec and the clock/pinmux support.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add a driver for I2S which allows audio data to be sent from the SoC to
the audio codec. The sample rate and other settings are hard-coded for now
as there is no suitable device-tree binding available.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

- ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
  pulse width (support some quirky displays)

- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable Video and USB Console for libretech-cc board

libretech-cc being the main device tested with CONFIG_VIDEO_MESON, let's
enable it by default.

Also enable:
 - CONFIG_SYS_WHITE_ON_BLACK for prettiness
 - CONFIG_VIDEO_DT_SIMPLEFB for framebuffer sharing with kernel
Signed-off-by: NMaxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>

With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,
CONFIG_SYS_CONSOLE_IS_IN_ENV.

This allows outputting the console via video if CONFIG_VIDEO_MESON is
selected.
Signed-off-by: NMaxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>

Allows displaying the console via video and using a USB keyboard.

Also enables CONFIG_SPLASH_SCREEN if using video.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NMaxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>