1. 11 12月, 2007 1 次提交
  2. 08 12月, 2007 1 次提交
  3. 06 12月, 2007 3 次提交
    • W
      Release v1.3.1 · 41be969f
      Wolfgang Denk 提交于
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      41be969f
    • W
      ADS5121 Board: fix compile problem. · cf5933ba
      Wolfgang Denk 提交于
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      cf5933ba
    • S
      ppc4xx: Enable hardware-fix for PCI/DMA errata on AMCC 440SP/SPe boards · a27044b1
      Stefan Roese 提交于
      This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by
      setting the FIXD bit in the SDR0_MFR register. Here a description of the
      symptoms:
      
      Problem Description
      ------------------------------
      If a DMA is performed between memory and PCI with the DMA 1 Controller
      using prefetch, and as a result uses a special purpose buffer selected by
      the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29),
      the first part of the transfer sequence is performed twice. The
      PPC440SPe PCI Controller requests more data than was needed such that in
      the case of enforce memory protection, a host CPU  exception can occur.
      No data is corrupted, because data transfer is stopped in the PCI
      Controller. Prefetch enable is specified by setting DMA Configuration
      Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0.
      
      Behavior that may be observed in a running system
      ---------------------------------------------------------------------------
      
      1. DMA performance is decreased because of the double access on the PCI bus
      interface.
      2. If an illegal access to some address on the PCI bus is detected at the
      system level, a machine check or similar system error may occur.
      
      Workarounds Available
      ----------------------------------
      
      1. Do not program prefetch. Note that a prefetch command cannot be programmed
      without selecting a special purpose buffer.
      2. To avoid crossing a physical boundary of the PCI slave device, add 512
      bytes of address to the PCI address range.
      
      This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com>
      from AMCC and slighly changed.
      Signed-off-by: NPravin M. Bathija <pbathija@amcc.com>
      Signed-off-by: NStefan Roese <sr@denx.de>
      a27044b1
  4. 04 12月, 2007 1 次提交
  5. 03 12月, 2007 1 次提交
  6. 30 11月, 2007 1 次提交
  7. 27 11月, 2007 6 次提交
  8. 26 11月, 2007 13 次提交
  9. 25 11月, 2007 2 次提交
  10. 23 11月, 2007 2 次提交
  11. 22 11月, 2007 8 次提交
  12. 21 11月, 2007 1 次提交