- 12 7月, 2019 6 次提交
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由 Eugeniu Rosca 提交于
Rename: - doc/{README.avb2 => android/avb2.txt} - doc/{README.android-fastboot => android/fastboot.txt} Add a new file documenting the 'bcb' command: - doc/android/bcb.txt The new directory structure has been reviewed by Simon in https://patchwork.ozlabs.org/patch/1101107/#2176031 . Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eugeniu Rosca 提交于
'Bootloader Control Block' (BCB) is a well established term/acronym in the Android namespace which refers to a location in a dedicated raw (i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc", which is used as media for exchanging messages between Android userspace (particularly recovery [1]) and an Android-capable bootloader. On higher level, this allows implementing a subset of Android Bootloader Requirements [2], amongst which is the Android-specific bootloader flow [3]. Regardless how the latter is implemented in U-Boot ([3] being the most memorable example), reading/writing/dumping the BCB fields in the development process from inside the U-Boot is a convenient feature. Hence, make it available to the users. Some usage examples of the new command recorded on R-Car H3ULCB-KF ('>>>' is an overlay on top of the original console output): => bcb bcb - Load/set/clear/test/dump/store Android BCB fields Usage: bcb load <dev> <part> - load BCB from mmc <dev>:<part> bcb set <field> <val> - set BCB <field> to <val> bcb clear [<field>] - clear BCB <field> or all fields bcb test <field> <op> <val> - test BCB <field> against <val> bcb dump <field> - dump BCB <field> bcb store - store BCB back to mmc Legend: <dev> - MMC device index containing the BCB partition <part> - MMC partition index or name containing the BCB <field> - one of {command,status,recovery,stage,reserved} <op> - the binary operator used in 'bcb test': '=' returns true if <val> matches the string stored in <field> '~' returns true if <val> matches a subset of <field>'s string <val> - string/text provided as input to bcb {set,test} NOTE: any ':' character in <val> will be replaced by line feed during 'bcb set' and used as separator by upper layers => bcb dump command Error: Please, load BCB first! >>> Users must specify mmc device and partition before any other call => bcb load 1 misc => bcb load 1 1 >>> The two calls are equivalent (assuming "misc" has index 1) => bcb dump command 00000000: 62 6f 6f 74 6f 6e 63 65 2d 73 68 65 6c 6c 00 72 bootonce-shell.r 00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r............. >>> The output is in binary/string format for convenience >>> The output size matches the size of inspected BCB field >>> (32 bytes in case of 'command') => bcb test command = bootonce-shell && echo true true => bcb test command = bootonce-shell- && echo true => bcb test command = bootonce-shel && echo true >>> The '=' operator returns 'true' on perfect match => bcb test command ~ bootonce-shel && echo true true => bcb test command ~ bootonce-shell && echo true true >>> The '~' operator returns 'true' on substring match => bcb set command recovery => bcb dump command 00000000: 72 65 63 6f 76 65 72 79 00 73 68 65 6c 6c 00 72 recovery.shell.r 00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r............. >>> The new value is NULL-terminated and stored in the BCB field => bcb set recovery "msg1:msg2:msg3" => bcb dump recovery 00000040: 6d 73 67 31 0a 6d 73 67 32 0a 6d 73 67 33 00 00 msg1.msg2.msg3.. 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ >>> --- snip --- >>> Every ':' is replaced by line-feed '\n' (0xA). The latter is used >>> as separator between individual commands by Android userspace => bcb store >>> Flush/store the BCB structure to MMC [1] https://android.googlesource.com/platform/bootable/recovery [2] https://source.android.com/devices/bootloader [3] https://patchwork.ozlabs.org/patch/746835/ ("[U-Boot,5/6] Initial support for the Android Bootloader flow") Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com>
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由 Eugeniu Rosca 提交于
Perform the following updates: - Relocate the commit id from the file to the description of U-Boot commit. The AOSP commit is c784ce50e8c10eaf70e1f97e24e8324aef45faf5. This is done to avoid stale references in the file itself. The reasoning is in https://patchwork.ozlabs.org/patch/1098056/#2170209. - Minimize the diff to AOSP, to decrease the effort of the next AOSP backports. The background can be found in: https://patchwork.ozlabs.org/patch/1080394/#2168454. - Guard the static_assert() calls by #ifndef __UBOOT__ ... #endif, to avoid compilation failures of files including the header. Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: NSam Protsenko <semen.protsenko@linaro.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tom Rini 提交于
When we have a FIT image being used by SPL by default that means the most common case is that we'll never run into a legacy image. Disable legacy image support by default in that case to reclaim space. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of cmd/ switch to using CONFIG_IS_ENABLED() to test what is set. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Roman Kapl 提交于
The TPM specification says that the EXPECT_DATA bit is not valid until the VALID bit is set. Wait for that bit to be set. Fixes problems with Ifineon SPI TPM. Signed-off-by: NRoman Kapl <rka@sysgo.com>
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- 11 7月, 2019 18 次提交
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由 Miquel Raynal 提交于
Overload the weak function board_boot_order() so that besides choosing the main boot device, we can fallback on USB boot by returning in the BootROM, eg. if the NOR flash is empty while it was the primary boot medium. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
The _main call is not supposed to return at all: don't link the branch. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
Implement the weak board_return_to_bootrom() function so that when enabling the spl_bootrom.c driver, one can make use of usbboot on spear platforms. All necessary information to return to the BootROM are stored in the BootROM's stack. The SPL stack pointer is reset so we save the BootROM's stack pointer into the SPL .data section. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
There is no reason to do the few spear-related initialization, in a different procedure than 'reset'. Spare one branching and get a linear code flow by removing this indirection. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
The link register is stored in R14. ARM assembly code allows to use the 'lr' name to reference it instead of 'r14' which is not very meaningful. Do the substitution to ease the reading. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
Quoting ARM "RealView Compilation Tools Assembler Guide v4.0": PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with the base register sp (r13), and the adjusted address written back to the base register. PUSH and POP are the preferred mnemonic in these cases. Let's follow this recommandation to ease the reading and substitute LDMIA/STMDB operations with PUSH/POP mnemonics. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
Before cleaning a bit further the spear/start.S file, apply a few cosmetic changes: capital letters, comment indentation and small rewriting. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
This comment describes the board state at the moment where we enter the SPL. The description is entirely wrong; re-write it to fit the reality. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
Rename Xloader as SPL in comments. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
It is clearly stated that board_init_f should *not* call board_init_r. Indeed, board_init_f should return. The code will continue through arch/arm/lib/crt0.S which will do more setup before calling board_init_r. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Miquel Raynal 提交于
Fix a tiny typo in boot_from_devices() kernel doc. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Ramon Fried 提交于
Add basic PCI endpoint sandbox testing. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
Add a dummy PCI endpoint for sandbox. Supporting only a single function, it allows setting and reading header configuration. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
Add Cadence PCIe endpoint driver supporting configuration of header, bars and MSI for device. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Ramon Fried 提交于
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-ubi由 Tom Rini 提交于
[trini: Migrate sama5d27_som1_ek_qspiflash/sama5d2_xplained_qspiflash for CONFIG_ENV_SECT_SIZE] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 09 7月, 2019 16 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel由 Tom Rini 提交于
First set of u-boot-atmel features and fixes for 2019.10 cycle This includes the Atmel QSPI driver and support for the at91 boards. This is the port of the driver from Linux, mostly done by Tudor Ambarus.
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由 Chuanhua Han 提交于
The previous pcf2127 RTC chip could not read and set the correct time. When reading the data of internal registers, the read address was the value of register plus 1. This is because this chip requires the host to send a stop signal after setting the register address and before reading the register data. This patch sets the register address using dm_i2c_write and reads the register data using the original dm_i2c_xfer in order to generate a stop signal after the register address is set, and fixes the bug of the original read and write time. Signed-off-by: NBiwen Li <biwen.li@nxp.com> Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com> Reviewed-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NHeiko Schocher <hs@denx.de>
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由 Eugen Hristev 提交于
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS and CONFIG_BOOTCOMMAND accordingly. Based on original work by Wenyou Yang. Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com> [tudor.ambarus@microchip.com: amend the commit message.] Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
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由 Tudor Ambarus 提交于
Use the qspi memory layout defined in at91-sama5_common - it aligns with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
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由 Tudor Ambarus 提交于
Add the default config file of QSPI media. The config is based on sama5d27_som1_ek_mmc_defconfig. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Tudor Ambarus 提交于
Add the default config file of QSPI media. The config is based on sama5d2_xplained_mmc_defconfig. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Cyrille Pitchen 提交于
Use the same memory layout as we use for the NAND boot on the other boards. QSPI flashes are present on the following boards: sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g) sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn) sama5d27_som1_ek: 8 Mbyte flash (sst26vf064b-104i/sn) sama5d2_ptc_ek: 8 Mbyte flash (sst26vf064b-104i/sn) The 8 Mbyte limit is enough to cope with the memory layout used in the NAND boot. rootfs exceeds the 8 Mbyte limit and will stay in eMMC in the sama5d2_xplained case. The final scope is to use a single memory layout for all boot medias. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: change memory layout, add commit message] Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
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由 Cyrille Pitchen 提交于
Fix the following: - use "jedec,spi-nor" binding, we use jedec compatible flashes - set bus width to 4, we use quad capable flashes - differentiate bewteen data and clk and cs pins - drop partions as we don't use them in u-boot. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message] Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
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由 Tudor Ambarus 提交于
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select the others for testing purposes. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Tudor Ambarus 提交于
We have a macronix spi-nor flash on sama5d2_xplained RevB and a sst spi-nor flash on RevC. Select the rest for testing purposes. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Tudor Ambarus 提交于
Backport the driver from linux v5.1-rc5 and adapt it for u-boot. Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Melin Tomas 提交于
Prior to starting a new transfer, conditionally wait for bus to not be busy. Reinitialise controller as otherwise operation is not stable. For reference, see linux kernel commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer") hs: Fixed DOS line endings added missing '\n' Fixed git commit description style Signed-off-by: NTomas Melin <tomas.melin@vaisala.com>
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由 Melin Tomas 提交于
Comparison should be against the actual message length, not loop index. len is used for stopping while loop, pos is position in message. stop should be sent when entire message is sent, not when len and pos meet. hs: fixed DOS line endings Signed-off-by: NTomas Melin <tomas.melin@vaisala.com>
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由 Ley Foon Tan 提交于
Get clock rate from clock DM if CONFIG_CLK is enabled. Otherwise, uses IC_CLK define. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Jun Chen 提交于
Before calling __dw_i2c_set_bus_speed(), the I2C could already be set as ether enable or disable, we should restore the original setting instead of enable i2c anyway. This patch fix a bug happened in init function: __dw_i2c_init(){ /* Disable i2c */ ... __dw_i2c_set_bus_speed(i2c_base, NULL, speed); writel(slaveaddr, &i2c_base->ic_sar); /* Enable i2c */ } In this case, enable i2c inside __dw_i2c_set_bus_speed() function will cause ic_sar write fail. Signed-off-by: NJun Chen <ptchentw@gmail.com>
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由 Markus Klotzbuecher 提交于
This allows to silence ubi and ubispl individually. Signed-off-by: NMarkus Klotzbuecher <markus.klotzbuecher@kistler.com> Reviewed-by: NHeiko Schocher <hs@denx.de> Cc: Kyungmin Park <kmpark@infradead.org>
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