- 07 12月, 2019 19 次提交
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由 AKASHI Takahiro 提交于
Imported from linux kernel v5.3: rsapubkey.asn1 without changes rsa.h without changes rsa_helper.c with changes marked as __UBOOT__ Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Imported from linux kernel v5.3: asymmetric-type.h with changes marked as __UBOOT__ asymmetric_type.c with changes marked as __UBOOT__ public_key.h with changes marked as __UBOOT__ public_key.c with changes marked as __UBOOT__ Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Imported from linux kernel v5.3: build_OID_registry without changes oid_registry.h without changes oid_registry.c with changes marked as __UBOOT__ Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
This document gives a brief description about ASN1 compiler as well as ASN1 decoder. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Imported from linux kernel v5.3: lib/asn1_decoder.c with changes marked as __UBOOT__ Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
This rule will be used to build x509 and pkcs7 parsers. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Imported from linux kernel v5.3: asn1.h without changes asn1_ber_bytecode.h without changes asn1_decoder.h without changes asn1_compiler.c without changes This host command will be used to create a ASN1 parser, for example, for pkcs7 messages or x509 certificates. More specifically, it will generate *byte code* which will be interpreted by asn1 decoder library. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 AKASHI Takahiro 提交于
Without this commit, time.h possibly causes a build error as asctime_r() uses sprintf(). Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Adding "printk.h" will help improve portability from linux kernel code (in my case, lib/asn1_decoder.c and others) where printf and pr_* variant functions are used. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
This function will be used in lib/crypto/x509_cert_parser.c, which will also be imported from linux code in a later commit. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
In the next commit, rtc_mktime(), for compatibility with linux, will be implemented using rtc_mktime(), which is no longer drivers/rtc specific. So move this file under lib/. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
Without this change, including rtc.h solely will cause a build error. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
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由 AKASHI Takahiro 提交于
linux_compat.c is the best place for kmemdup(), which is currenly used only in ubifs.c, but will also be used when other kernel files (in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be imported. So just move it. Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Patrice Chotard 提交于
Fix checkpatch WARNING and CHECK issues Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
Fix checkpatch WARNING and CHECK issues Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
Fix checkpatch WARNING and CHECK issues Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
Extract all sysboot command related code from pxe.c to new sysboot.c Update Kconfig to insure that DISTRO_DEFAULT select new CMD_SYSBOOT command. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
As sysboot and pxe commands are sharing piece of code, migrate this common code into a new file pxe_utils.c to prepare sysboot command code extraction from pxe.c Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
Migrate from_env() from pxe.c to nvedit.c as it's not pxe specific. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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- 06 12月, 2019 12 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs
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由 Tom Rini 提交于
Due to the (seemingly bogus) assumption of a default CONFIG_SYS_UBOOT_START value we will revert this change for now and evaluate it again for the next release along with changes to CONFIG_SYS_UBOOT_START. This reverts commit d3e97b53. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
- Assorted omapl138_lcdk / da850-evm fixes - FAT fix, add another pytest as well for FAT. - Assorted general fixes
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由 Ben Wolsieffer 提交于
Recent versions of the Linux kernel with many options enabled have grown large enough to overwrite the beginning of the initrd. For example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB, while only 31.5 MiB are available between kernel_addr_r and ramdisk_addr_r. This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399, allowing for much larger kernels. Signed-off-by: NBen Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Ben Wolsieffer 提交于
This enables reading of the cpuid and a static MAC address. Signed-off-by: NBen Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3328 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 David Wu 提交于
Add the glue code to allow the rk3308 variant of the Rockchip gmac to provide network functionality. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
This is a core board named Core-PX30-JD4 with a mainboard from Firefly, name it as firefly-px30 for now. This board can re-use the dts of PX30, the only difference is the UART IO, the firefly use UART2 M1 while evb use UART2 M0. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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- 05 12月, 2019 9 次提交
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由 Heiko Stuebner 提交于
serial# is one of the vendor properties and thus protected from being overwritten if already set. If env_set is called anyway this result in some nasty warnings, so check for presence before trying that. In the same direction check for the presence of cpuid# and compare it to the actual hardware and emit a warning if they don't match. Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Heiko Stuebner 提交于
rockchip_setup_macaddr() runs from an initcall, so returning an error code will make that initcall fail thus breaking the boot process. And if an ethernet address is already set this is definitly not a cause for that, so just return success in that case. Fixes: 04825384 ("rockchip: rk3399: derive ethaddr from cpuid"); Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Paul Kocialkowski 提交于
Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
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由 Paul Kocialkowski 提交于
UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Paul Kocialkowski 提交于
According to the PX30 TRM, the iomux registers come first, before the pull and strength control registers. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
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由 Andy Yan 提交于
PX5 evb has no ETH port, so disable it. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Andy Yan 提交于
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Andy Yan 提交于
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Andy Yan 提交于
After commit d8765e24 ("Enable building of u-boot.itb on Rockchip platform"), u-boot.itb will automatically generated by "make all" command, manually command "make u-boot.itb" is no longer needed. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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