After the DM_MMC conversion the following eMMC boot error is observed:

U-Boot SPL 2019.04-rc4 (Mar 20 2019 - 18:53:28 +0000)
Trying to boot from MMC1
MMC Device 0 not found
spl: could not find mmc device 0. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

This happens because the SPL code does not initialize the SDHC pins
and clock.

Fix it by moving the original eMMC initialization from U-Boot proper
to SPL.
Reported-by: NOtavio Salvador <otavio@ossystems.com.br>
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Tested-by: NFabio Berton <fabio.berton@ossystems.com.br>
Reviewed-by: NOtavio Salvador <otavio@ossystems.com.br>

Signed-off-by: NStefano Babic <sbabic@denx.de>

- Bugfixes:
  - mmc: correct the HS400 initialization process
  - configs: ti: Move FIT image load address to avoid overwrite
  - lib: time: update module enable MACRO
  - Add mbrugger as RPi board maintainer, correct agraf's email address.

We'd better use correct way to check if module has enabled.
for we have 3 timer MACRO:
- CONFIG_TIMER
- CONFIG_SPL_TIMER
- CONFIG_TPL_TIMER
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Correct Alex's email address.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NAlexander Graf <agraf@csgraf.de>

I took over maintainership from Alex Graf with commit
3157bbfa ("rpi: Make Matthias maintainer")
But I forgot to update the board maintainer file.
This patch adds myself to the game.
Signed-off-by: NMatthias Brugger <mbrugger@suse.com>
Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NAlexander Graf <agraf@csgraf.de>

The FIT image is loaded to 0x8700_0000 followed by extracting from that
several large images also into the 0x8x00_0000 range. Large images
can end up overwriting the FIT image as it is being extracted from.
Move the FIT load address clear out to 0x9000_0000, this will require
a board to have at least 256MB of DRAM, if less then more careful
planning will be required for that platform.
Signed-off-by: NAndrew F. Davis <afd@ti.com>

After the commit b9a2a0e2 ("mmc: Add support for downgrading
HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
which indicates that the HS200/HS400 to HS downgrade is happening.

During the HS400 initialization, first select to HS200, and config
the related clock rate, then downgrade to HS mode. So here also need
to config the downgrade value to be true for two reasons. First,
make sure in the function mmc_set_card_speed(), after switch to HS
mode, first config the clock rate, then read the EXT_CSD, avoid
receiving data of EXT_CSD in HS mode at 200MHz. Second, after issue
the MMC_CMD_SWITCH command, it need to wait a bit then switch bus
properties.

Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer
mode in this case, and USDHC will never get data transfer complete
status, cause the uboot hang.
Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>

Pull request for UEFI system for v2019.04-rc5-2

This patch series contains a bug fix for a double free in a UEFI unit
test. The other patches are documentation only (except for the definition
of two additional constants).

This is last minute change which fixes problems in runtime on
AXS10x board caused by some changes in NAND framework and
tiny documentation improvement.

Anyways NAND flash storage was never really used on the board for various
reasons and now we decided to drop it for good.

Note this change only touches 1 ARC board so that should be safe for others.
As usual - build tested in TravisCI, see
https://travis-ci.org/abrodkin/u-boot/builds/512041342

Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Suggested-by: NYunir Salimzyanov <yunir@synopsys.com>

On AXS10x boards we have non-standard NAND controller
which was never really used a lot as there're other much more
convenient [as they are standard & removable] persistent media
like SD-card and USB mass storage.

Moreover after recent changes we face with some NAND controller
runtime issues. So instead of keeping support of yet another
non-standard peripheral we're dropping its support for good.
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Describe the target scope of the UEFI implementation in U-Boot.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

The following TODOs are closed:

- GetNextVariableName is not implemented
- event groups
- manage events in a linked list
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

The EFI PAYLOAD will use git://git.denx.de/u-boot-efi.git in future.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

We currently only support EFI_FILE_PROTOCOL_REVISION while
UEFI specs 2.4 - 2.7 prescribe EFI_FILE_PROTOCOL_REVISION2.
Add a todo.

Add missing constants for the EFI file protocol revision.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Avoid duplicate FreePool() in unit test for the device patch utilities
protocol.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

- configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF

- Various fixes for bugs found by u-boot test.py

- Convert various SPI related options to Kconfig

This converts the following to Kconfig:
  CONFIG_ENV_SPI_BUS
  CONFIG_ENV_SPI_CS
  CONFIG_ENV_SPI_MAX_HZ
  CONFIG_ENV_SPI_MODE

Most of time these value are not needed, CONFIG_SF_DEFAULT
with same value is used, so I introduced CONFIG_USE_ENV_SPI_*
to force the associated value for the environment.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

This converts the following to Kconfig:
   CONFIG_DEFAULT_SPI_BUS
   CONFIG_DEFAULT_SPI_MODE
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

This converts the following to Kconfig:
  CONFIG_SF_DEFAULT_BUS
  CONFIG_SF_DEFAULT_CS
  CONFIG_SF_DEFAULT_MODE
  CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Define the function board_spi_cs_gpio only when needed,
only called in drivers/spi/mxc_spi.c.
That avoid compilation issue for tqma6s_wru4_mmc_defconfig
when CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS are not
defined (CMD_SF not defined) after migration in KConfig.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Replace CONFIG_ENV_SPI_BASE by the better CONFIG_SYS_SPI_BASE
(it is not the location for environment but the location for U-Boot)
and, as it is the only platform with use this define, remove
it from whitelist.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Move some configurations in defconfig file
- CONFIG_CMD_I2C
- CONFIG_CMD_SPI

This allow correct dependency handling in Kconfig.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Move some configurations in defconfig file
- CONFIG_DM_SPI (removed by syncing defconfigs )
- CONFIG_CMD_SF
- CONFIG_CMD_SPI
- CONFIG_CMD_SF_TEST

This allow correct dependency handling in Kconfig.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

- 3 bugfixes:
  - mmc: Align MMC_TRACE with tiny printf
  - scripts/Makefile.extrawarn: Silence more DTC warnings
  - rsa: check that pointer checksum isn't NULL before using it

On 16bit variants of the TMIO SD IP, the SECCNT register can only be
programmed to 16bit values, while on the 32bit and 64bit variants it
can be programmed to 32bit values. The SECCNT register indicates the
maximum number of blocks in a continuous transfer. Hence, limit the
maximum continuous transfer block count to 65535 blocks on 16bit
variants of the TMIO IP and to BIT(32)-1 blocks on 32bit and 64bit
variants.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>

Set MMCIF clock rate to 97.5 MHz, which is the default according
to Gen2 datasheet.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>

Add code for configuring the MMC0CKCR/MMC1CKCR on Gen2 platforms.
This allows the MMCIF driver to set higher clock rate if desired.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

The $div and $mul values were swapped in the debug output,
fix this.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

The gen2_clk_get_sdh_div() function is supposed to look up the
$val value read out of the SDCKCR register in the supplied table
and return the matching divider value. The current implementation
was matching the value from SDCKCR on the divider value in the
table, which is wrong. Fix this and rework the function a bit
to make it more readable.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

An ADATA 16GB Industrial MLC card has so much capacitance on the Vcc
pin that the usual toggling of regulator to power the card off and on
is insufficient. When the card is calibrated into UHS SDR104 mode, it
will remain in that mode across the power cycle and subsequent attempt
to communicate with the card will fail.

The test with this card is to insert it into an SDHI slot and perform
"mmc dev 0 ; mmc dev 0", where the second "mmc dev 0" will fail.

Fix this problem by increasing the off-on delay from 0 to 20 mS.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Use full printf instead of tiny printf in SPL.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

The tiny printf implementation only supports %x format specifier,
it does not support %X . Since it makes little difference whether
the debug output prints hex numbers in capitals or not, change it
to %x and make the MMC_TRACE output work with tiny printf too.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>

While our "extrawarns" logic has gotten out of sync with upstream
Kbuild, for now lets start by bringing in the latest set of DTC_FLAGS
from the Linux Kernel 5.0 to match their behavior in silencing warnings
from dtc.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

The pointer checksum were used before checking that it
isn't NULL. We move the code that use it after the check.

Reported-by: Coverity (CID: 185835)
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

- Don't attempt to write to ext4 volumes with the metadata_csum feature
  we don't support
- Correct how we build dtb files.
- Fix regression on SPL_FIT with FIT_IMAGE_TINY
- Minor TI platform fixes

U-Boot doesn't support metadata_csum feature. Writing to filesystem with
metadata_csum feature makes the filesystem corrupted and unbootable by
Linux:

[    2.527495] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 0 failed (52188!=0)
[    2.537421] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 1 failed (5262!=0)
...
[    2.653308] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 14 failed (42611!=0)
[    2.662179] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 15 failed (21527!=0)
[    2.687920] JBD2: journal checksum error
[    2.691982] EXT4-fs (mmcblk0p2): error loading journal
[    2.698292] VFS: Cannot open root device "mmcblk0p2" or unknown-block(179,2): error -74

Don't write to filesystem with meatadata_csum feature to not corrupt the
filesystem.
Signed-off-by: NSébastien Szymanski <sebastien.szymanski@armadeus.com>