- 09 2月, 2018 1 次提交
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由 Adam Ford 提交于
This converts the following to Kconfig: CONFIG_APBH_DMA CONFIG_APBH_DMA_BURST CONFIG_APBH_DMA_BURST8 Signed-off-by: NAdam Ford <aford173@gmail.com> Reviewed-by: NStefan Agner <stefan.agner@toradex.com> [trini: Add in MMC as well] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 04 2月, 2018 3 次提交
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由 Peng Fan 提交于
Introduce SDR104 and HS200 support The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c as reference. - Implement esdhc_change_pinstate to dynamically change pad settings - Implement esdhc_set_timing - Implement esdhc_set_voltage to switch voltage - Implement fsl_esdhc_execute_tuning to execute time process - Enlarge the cfg->f_max to 200MHz. - Parse fsl,tuning-step, fsl,tuning-start-tap and fsl,strobe-dll-delay-target from device tree. - Parse no-1-8-v property - Introduce esdhc_soc_data to indicate the flags and caps Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Peng Fan 提交于
Add entries that will be used for tuning control. The whole layout not changed, just expand reserved3[84] and rename other reservedx in sequence. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Peng Fan 提交于
Support i.MX8M in fsl esdhc driver. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NStefano Babic <sbabic@denx.de> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
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- 29 1月, 2018 1 次提交
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由 Alexander Graf 提交于
The BCM2835 family of SoCs has 2 different SD controllers: One based on the SDHCI spec and a custom, home-grown one. This patch implements a driver for the latter based on the Linux driver. This is needed so that we can make use of device trees that assume driver presence of both SD controllers. Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 24 1月, 2018 3 次提交
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由 Jun Nie 提交于
Poll for broken card detection case instead of return no card detected. Signed-off-by: NJun Nie <jun.nie@linaro.org>
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由 Jaehoon Chung 提交于
When clock is enabling, it's assigned to 0 as mmc->clock. Then it can't initialize any card. Fix to assign to correct clock value as mmc->cfg->f_min or f_max. Fixes: 9546eb92 ("mmc: fix the wrong disabling clock") Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NGuillaume GARDET <guillaume.gardet@free.fr> Tested-by: NAnand Moon <linux.amoon@gmail.com> Tested-by: NStephen Warren <swarren@nvidia.com>
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由 Álvaro Fernández Rojas 提交于
wait_for_bit callers use the 32 bit LE version Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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- 22 1月, 2018 9 次提交
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由 Benoît Thébaudeau 提交于
Commit 4f425280 ("mmc: fsl_esdhc: Allow all supported prescaler values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on i.MX, thus bypassing the SD clock frequency prescaler, in order to be able to get higher SD clock frequencies in some contexts. However, that commit missed the fact that this value is illegal on the eSDHCv3 instance of the i.MX53. This seems to be the only exception on i.MX, this value being legal even for the eSDHCv2 instances of the i.MX53. Fix this issue by changing the minimum prescaler value for the single instance of the i.MX53 eSDHCv3 controller. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
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由 Jaehoon Chung 提交于
When power is off, clock is not disabling. Because it's passed to 1, mmc->clock should be set to f_min value. Some drivers can't initialize the eMMC/SD card with current status. This patch is to fix the disabling clock value to 0. Fixes: 2e7410d7 ("mmc: disable the mmc clock during power off") Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: NGuillaume GARDET <guillaume.gardet@free.fr> Tested-by: NAnand Moon <linux.amoon@gmail.com>
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由 Masahiro Yamada 提交于
During the tuning, drivers repeat data transfer, changing timing parameters in the controller hardware. So, the tuning commands (CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem at all. Showing "Error detected..." in normal operation just make users upset. This should not be shown. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
Add HS200 timing setting and the MMC tuning callback. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Masahiro Yamada 提交于
This is needed to parse more capabilities such as mmc-hs200-1_8v. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
This driver is a counterpart from the one in Linux. Follow the clean-up I did in Linux. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
This line overwrites host_cap that has been set by drivers and/or helpers like mmc_of_parse(). Accumulate capabilities flags. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
You must fix your DT if it specifies insane bus-width, for example, bus-width = <3>; debug() is not displayed in usual configuration, so people will not even notice weirdness. Use dev_err() instead, then let it fail. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to 52MHz even if DT does not provide "max-frequency" at all. This can overwrite cfg->f_max that may have been set to a reasonable default. As the DT binding says, "max-frequency" is an optional property. Do nothing if DT does not specify it. This is the behavior of mmc_of_parse() in Linux. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 20 1月, 2018 3 次提交
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由 Kishon Vijay Abraham I 提交于
omap_hsmmc driver uses "|" in a couple of places for disabling a bit. While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a _mask_ argument to take care of resetting a bit), it's incorrectly used for resetting flags in "omap_hsmmc_send_cmd". Fix it here by using "&= ~()" to reset a bit. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Kishon Vijay Abraham I 提交于
Instead of sending STOP TRANSMISSION command from MMC core, enable the auto command feature so that the Host Controller issues CMD12 automatically when last block transfer is completed. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Kishon Vijay Abraham I 提交于
The omap hsmmc host controller can have the ADMA2 feature. It brings better read and write throughput. On most SOC, the capability is read from the hl_hwinfo register. On OMAP3, DMA support is compiled out. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 19 1月, 2018 1 次提交
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由 Jean-Jacques Hiblot 提交于
This reverts commit 46831c1a. This reserved area at the beginning of struct hsmm, will be used later to support ADMA Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 12 1月, 2018 19 次提交
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由 Peng Fan 提交于
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init, then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has already set VSELECT to 1.8v before running the u-boot. This reset in USDHC driver causes a short 2.2v pulse on CMD pin. Fix this issue by not reset VSELECT to 0 when 1.8v flag is set. Signed-off-by: NYe Li <ye.li@nxp.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Jean-Jacques Hiblot 提交于
hc_wp_grp_size is needed only if hardware partitionning is used. On ARM removing it saves about 30 bytes of code space. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
This information is only used by the "mmc info" command. On ARM removing this information from SPL saves about 140 of code space. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Also remove erase_grp_size and write_bl_len from struct mmc as they are not used anymore. On ARM, removing them saves about 100 bytes of code space in SPL. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
The content of ssr is useful only for erase operations. on ARM, removing sd_read_ssr() saves around 300 bytes. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code needed only if write support is required. The option is added for u-boot and for SPL Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Using a table versus a switch() structure saves a bit of space Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
struct mmc_data contains the block size to use for the data transfer. Use this information instead of using the default value or the block length information stored in struct mmc. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
The SDcard initialization procedure does a few more things than it did earlier: * switch the bus width even for 1-bit bus width * check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC) Update the SD simulator to handle those requests gracefully. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Jean-Jacques Hiblot 提交于
Not all boards have an eMMC and not all users have a need for this. Allow to compile it out. By default it is still included. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Supporting USH and HS200 increases the code size as it brings in IO voltage control, tuning and fatter data structures. Use Kconfig configuration to select which of those features should be built in. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
This allows to compile out the log message by tweaking the LOGLEVEL. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
Not using this function reduces the size of the binary. It's replaces by a standard malloc() and the alignment requirement is handled by an intermediate buffer on the stack. Also make sure that the allocated buffer is freed in case of error. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
The ext_csd is allocated only for MMC above version 4. The compare will crash or fail for older MMCs. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Make sure that those basic capabilities are advertised by the host. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
As the legacy modes were not added to the list of supported modes, old cards that do not support other modes could not be used. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
* convert to livetree API * don't fail because of an invalid bus-width, instead default to 1-bit. * recognize 1.2v DDR and 1.2v HS200 flags Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
This is a useful information while debugging the initialization process or performance issues. Also dump this information with the other mmc info if the verbose option is selected Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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