This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.

To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.

Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.

Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Also added DT binding doc for stm32 fmc(flexible memory controller).
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

Add CONFIG_CMD_USB to the defconfig file.
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add CONFIG_USB_STORAGE to the defconfig file.
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

USB bus scan attempt:
----------------------------------cut----------------------------------
=> usb start
starting USB...
USB0:   Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... data abort
pc : [<fff6240e>]          lr : [<fff623b3>]
reloc pc : [<8081b40e>]    lr : [<8081b3b3>]
sp : fdf42930  ip : fdf42960     fp : 00000000
r10: 00000001  r9 : fdf42ef0     r8 : 48890020
r7 : 00000002  r6 : fffa5840     r5 : fff8b140  r4 : fdf429c0
r3 : 00000000  r2 : 00000004     r1 : 00000000  r0 : 00000000
Flags: nZcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...
----------------------------------cut----------------------------------

Fix by enabling USB configuration in the SPL.
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NIgor Grinberg <grinberg@compulab.co.il>

Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.

Modifications:
* Enable USB clocks in the OMAP version of the function
  board_usb_init.
* Disable USB clocks in the OMAP version of the function
  board_usb_cleanup.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>

A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c

To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
  normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
  the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
  omap_xhci_board_usb_init.
  Done only for boards that defines CONFIG_USB_XHCI_OMAP.

To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
  board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
  to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
  omap_xhci_board_usb_cleanup.
  Done only for boards that defines CONFIG_USB_XHCI_OMAP.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NRoger Quadros <rogerq@ti.com>

Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NRoger Quadros <rogerq@ti.com>
Acked-by: NMarek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>

The symbol CONFIG_DRA7XX is needed for Kconfig conditions.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

The logical expression to check the dtb is incorrect in
load_devicetree.

The problem was indicated by cppcheck.

The inconsistent variable name dtppart is changed to dtbpart.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: NHannes Schmelzer <oe5hpm@oevsv.at>

The evaluation of option -c is incorrect:

According to the C99 standard endptr in the first strtol is always
set as &endptr is not NULL.
So the first part of the or condition is always true.
If all digits in optarg are valid endptr will point to the closing \0
and the second strtol will read beyond the end of the string optarg
points to.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

va_start must always be matched by va_end.

The problem was indicated by cppcheck.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

We should not first dereference p and afterwards assert that is
was not NULL. Instead do the assert first.

The problem was indicated by cppcheck.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

In dram_init_banksize there seems to be a typo concerning
a plausibility check of the fdt.
Testing sc > 2 twice does not make any sense.

The problem was indicated by cppcheck.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

A feature rich Linux kernel needs more than 8 MiB.
Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems.
As all known GXBB systems have at least 512 MiB of RAM this poses no problem.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1: 77b8d048)
Signed-off-by: NSuniel Mahesh <suniel.spartan@gmail.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

Mention eMMC and microSD as supported devices.

They have been enabled with patch
d0c5c8d5
odroid-c2: enable new Meson GX MMC driver in board defconfig
which was accepted for u-boot-mmc.git.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

0x10000000 is the start of a 2 MiB area used by the
ARM Trusted Firmware (BL31).

See
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?id=refs/tags/v4.10.10

So we should not load the ramdisk here.

The legacy Ubuntu image for the Odroid C2 comes with the
following line in boot.ini:
setenv initrd_loadaddr "0x13000000"

See
http://odroid.in/ubuntu_16.04lts/ubuntu64-16.04-minimal-odroid-c2-20160815.img.xz
http://deb.odroid.in/c2/pool/main/u/u-boot/u-boot_20170226-752a100-8_arm64.deb

So let's use the same address.

With the patch booting Linux with booti succeeds on an Odroid C2,
without the patch Linux hangs.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NVagrant Cascadian <vagrant@debian.org>

To enable automatic booting from SD card or eMMC the MMC
devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES.

Booting from SD card, eMMC, and DHCP are tried in sequence.
A missing or failing device is gracefully handled.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: NVagrant Cascadian <vagrant@debian.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Tested-by: NAndreas Färber <afaerber@suse.de>