This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM by the deadline.
Remove them.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Erik van Luijk <evanluijk@interact.nl>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

The mvsata_ide driver was due for DM conversion by v2019.07.  As that
has long passed, remove the driver and disable it in the boards which
had enabled it.
Signed-off-by: NTom Rini <trini@konsulko.com>

This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.
Signed-off-by: NTom Rini <trini@konsulko.com>

This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  In order to
convert to using the DWC SATA driver under DM further migrations are
required.

Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NChristian Gmeiner <christian.gmeiner@gmail.com>

This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: NTom Rini <trini@konsulko.com>

The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.
Signed-off-by: NTom Rini <trini@konsulko.com>

Enable the AHCI and BLK features to complete migration of various
drivers.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1

u-boot-imx-20210409
-------------------

- Secure Boot :
	- HAB for MX8M / MX7ULP
	- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
	- mx23 olinuxo
	- usbarmory
	- marsboard / riotboard
	- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089

Split up get_soc_name(), clean the decoding up a bit, and set up
environment variables which contain the SoC type, package, revision.
This is useful on SoMs, where multiple SoC options are populated.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>

A now removed comment promises to "limit SYSRAM usage to first 128 KB".
This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be
used. This is not what happens at all.

First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all
existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000).
Some of it is in the first 128 KiB and some of it is in the second
128 KiB chunk of SYSRAM.

Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant
attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much
larger than SYSRAM, and doesn't account for the non-BSS sections.

Because we're putting the .text and .bss in the same boat, the correct
way to limit them together is via SPL_MAX_FOOTPRINT. With the current
SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first
128 KiB, and there is no technical reason to do so. Because of this,
simply allow the SPL to use all SYSRAM.
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>

CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts.
stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds,
which does not make use of this definition.

The SPL BSS starts in SRAM, right after .text, .rodata, .data, and
.u_boot_list. A very short version of the STM32MP1 memory map is:
  * SYSRAM: 2ffc0000 - 30000000     <- all of SPL is here
  * DRAM:   c0000000+

0xC0200000 is a DRAM address, and has nothing to do with SPL. It is
just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to
have it at all.
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>

Since commit 03f1f78a ("spl: fit: Prefer a malloc()'d buffer for
loading images"), FIT images must be malloc()'d before being loaded.
The old size of 1 MiB is suitable for FIT images with u-boot and an
FDT, but something containing a linux kernel is almost sure to fail.

It's safe to extend malloc all the way to 0xc2000000, but no further.
Linux likes to be loaded at 0xc2000000, so we use that as our cutoff
point. This gives us 29 MiB of malloc() space, which suited for more
complex FIT images including several DTBs, kernel, and OP-TEE images.
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>

Simplify the code of the function board_check_usb_power
based in CONFIG_ADC and adc_measurement; the function is removed by the
linker when the CONFIG_ADC is not activated.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Replace the remaining printf in setup_boot_mode() by log macro
to handle filtering for log features.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>

Align the uart number in the trace of setup_boot_mode() with the name of
the uart/usart device (start at 1) and not with the instance value
(start at 0), i.e. the serial device sequence number and the index in
serial_addr[].

Fixes: f49eb16c ("stm32mp: stm32prog: replace alias by serial
device sequence number")
Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>

Add support of TF-A FIP header in command stm32prog for all the boot
partition and not only the STM32IMAGE.

This patch is a preliminary patch to support FIP as second boot stage
after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain.

The FIP is archive binary loaded by TF-A BL2, which contains the secure OS
= OP-TEE and the non secure firmware and device tree = U-Boot.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>

7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.

Linux dts commit details:

commit <1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 7" OF")

Add support for it.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.

Linux dts commit details:

commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 board")

Add support for it.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S

MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.

Linux dts commit details:

commit <0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
SoM")

Add support for it.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.

Linux dts commit details:

commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")

Add support for it.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.

Linux dts commit details:

commit <adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
EDIMM2.2 Starter Kit")

Add support for it.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

SPI Load isn't mandatory for STM32 builds.

Let's imply instead of select it to get rid of build
issues for non-SPI defconfigs.
Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>