Signed-off-by: NStany MARCEL <stany.marcel@novasys-ingenierie.com>

This adds basic files for the sandbox board. The lds file is very simple
since we can rely mostly on the linker defaults.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NZhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKuldip Giroh <kuldip.giroh@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x80100000.

About USB boot tool
-------------------

Jz4740 is one of the XBurst processors with USB boot functionality
supported.  The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website.  Also
there is an alternative Debian package named xburst-tools.
Signed-off-by: NXiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: NDaniel <zpxu@ingenic.cn>
Signed-off-by: NShinya Kuribayashi <skuribay@pobox.com>

An entry in the main Makefile for the mx31pdk board is not
necessary, and the board is added to boards.cfg as all
other targets.
Signed-off-by: NStefano Babic <sbabic@denx.de>
CC: Wolfgang Denk <wd@denx.de>

Signed-off-by: NStefano Babic <sbabic@denx.de>

Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
   (Please note that ISBC expects all these addresses, images to be
    validated, entry point etc within 0 - 3.5G range)
3. ISBC validates the u-boot image, and passes control to u-boot
   at 0xcffffffc.

Changes in u-boot:
1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M
   CONFIG_SYS_PBI_FLASH_WINDOW in AS=1.
   (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash
    created by PBL/configuration word within 0 - 3.5G memory range. The
    u-boot image at this address has been validated by ISBC code)
2. Remove TLB entries for 0 - 3.5G created by ISBC code
3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by
   PBL/configuration word after switch to AS = 1
Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: NKuldip Giroh <kuldip.giroh@freescale.com>
Acked-by: NWood Scott-B07421 <B07421@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: NKuldip Giroh <kuldip.giroh@freescale.com>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The EST SBC8260 is over 10 years old, and the SBC8240 older than
that.  With the tiny amount of RAM (by today's standards), there
really isn't anyone interested in running the latest U-boot on
these EOL products anymore.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
CC: jon.diekema@smiths-aerospace.com

Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>

Add the initial support for MX25PDK booting from SD card via internal boot.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

And various defines to enable NAND support and NAND spl code for the
P1010RDB platform.
Signed-off-by: NDipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Boot methods supported: NOR Flash, SPI Flash and SDCARD
This patch adds the following basic interfaces:
DDR3, eTSEC, DUART, I2C, SD/MMC, USB, SATA, PCIe, NOR Flash, SPI Flash.

P1010RDB Overview
-----------------
1Gbyte DDR3 (on board DDR)
Local Bus (IFC):
	32Mbyte 16bit NOR flash
	32Mbyte SLC NAND Flash
	64KB CPLD device(GPCM interface)
SPI Flash:
	128 Mbit SPI Flash memory
SD/MMC:
	connector to interface with the SD memory card
SATA:
	1 internal SATA connect to 2.5. 160G SATA2 HDD
	1 eSATA connector to rear panel
USB 2.0:
	x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface.
	x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet
eTSEC:
	eTSEC1: Connected to RGMII PHY VSC8641XKO
	eTSEC2: Connected to SGMII PHY VSC8221
	eTSEC3: Connected to SGMII PHY VSC8221
eCAN:
	Two DB-9 female connectors for Field bus interface
UART:
	supports two UARTs up to 115200 bps for console
TDM:
	2 FXS ports connected via an external SLIC to the TDM interface.
SLIC:
	SPI SLIC
I2C:
	Serial EEprom
	Real time clock
	256 Kbit M24256 I2C EEPROM
PCIe:
	PCIe and mPCIe connectors.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NDipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The following boards share a common design but with minor variations
between them:

P1020MSBG-PC
P1020RDB-PC
P1020UTM-PC
P1021RDB-PC
P1024RDB
P1025RDB
P2020RDB-PC

The P1020RDB-PC shares its roots in the existing P1020RDB board design,
however uses DDR3 instead of DDR2.
P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK.

Key features on these boards include:
* DDR3
* NOR flash
* NAND flash (on RDB's only)
* SPI flash (on RDB's only)
* SDHC/MMC card slot
* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
* PCIE slot and mini-PCIE slots

As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
is used to store SPD data. In case of absent or corrupted SPD, falling back
to timing data embedded in the source code will be used. Raw timing data is
extracted from DDR chip datasheet. Different speeds of DDR are supported
with this approach. ODT option is forced to fit this set of boards, again
because they don't have regular DIMMs.

CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet
specification for writing timing.

VSC firmware Address is defined by default in config file for eTSEC1.

SD width is based off DIP switch. DIP switch is detected on the
board by reading i2c bus and setting the appropriate mux values.

Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC
have pins multiplexing. QE function needs to be disabled to access Nor Flash
and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below

'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NLi Yang <leoli@freescale.com>
Signed-off-by: NZhao Chenhui <b26998@freescale.com>
Signed-off-by: NMatthew McClintock <msm@freescale.com>
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: NTang Yuantian <b29983@freescale.com>
Signed-off-by: Nramneek.mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NMatthew McClintock <msm@freescale.com>
Signed-off-by: NXie Xiaobo <X.Xie@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: NAkhil Goyal <akhil.goyal@freescale.com>

Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: NStefan Roese <sr@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Rolf Offermanns <rof@sysgo.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Thomas Elste <info@elste.org>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: George G. Davis <gdavis@mvista.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Curt Brune <curt@cucy.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Some typoes in Makefile and boards.cfg make the M54455 board
and M53017 board configuration broken.
Signed-off-by: NJason Jin <Jason.jin@freescale.com>

Origen board is based upon S5PV310 SoC which is similiar to
S5PC210 SoC.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Stelian Pop <stelian.pop@leadtechdesign.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>