The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>

Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop.  This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.
Signed-off-by: NSwarthout Edward <swarthout@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>

Fix the 85xxcds tsec bug.
When enable PCI, tsec.o should be added to u-boot.lds to make tsec work.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>

This patch apply workaround of CPU2 errata on MPC8548CDS board.
Signed-off-by: NEbony Zhu <ebony.zhu@freescale.com>

This patch disables MPC8548CDS 2T_TIMING for DDR by default.
Signed-off-by: NEbony Zhu <ebony.zhu@freescale.com>

Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
board.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NDetlev Zundel <dzu@denx.de>

G2 core reference manual says decrementer and time base
are decreasing/increasing once every 4 bus clock cycles.
Lets fix it, so time in Linux won't run twice as fast
Signed-off-by: NDomen Puncer <domen.puncer@telargo.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>

What was suppose to be a stack variable was declared as a pointer,
  overwriting random memory.
Also moved the libfdt.a requirement into the main Makefile.  That is
  The U-Boot Way.

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Sigend-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NDomen Puncer <domen.puncer@telargo.com>

Signed-off-by: NStefan Roese <sr@denx.de>

Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:

U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)

CPU:   AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
       Bootstrap Option E - Boot ROM Location EBC (32 bits)
       16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board
Signed-off-by: NStefan Roese <sr@denx.de>

Add Konstantin Kletschke for scb9328.
Signed-off-by: NPeter Pearse <peter.pearse@arm.com>

U-Boot part of Lite5200b low power mode support.
Puts SDRAM out of self-refresh and transfers control to
address saved at physical 0x0.
Signed-off-by: NDomen Puncer <domen.puncer@telargo.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>

Use "setter" functions instead of flags, cleaner and more flexible.
It also fixes the problem noted by Timur Tabi that the ethernet MAC
addresses were all being set incorrectly to the same MAC address.

In bootm, create the "/chosen" node only if it doesn't already exist
  (better matches the previous behavior).
Update for proper reserved memory map handling for initrd.

Set up the portmux for the MMC interface and enable the MMC driver
along with support for DOS partitions, ext2 and FAT filesystems.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement functions for configuring the mmci pins, as well as
functions for getting the clock rate of the mmci controller.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>