Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:

"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:

"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Tested-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

It supports boot from NAND and SD/MMC card.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

If without switch to main crystal oscillator, the sama5d3 SoC will
use internal on chip RC oscillator.
In order to get better accuracy, switch to main crystal oscillator.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The correct value for this setting can vary across SoCs and boards, so make it
configurable.

Also reduce the default value to 8, which is the same default as used in the
Linux driver.
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>

On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote:
> The {r,t}xbuffs fields also need to be aligned. Previously this was done
> implicitly because they immediately followed the descriptor tables. Make this
> explicit and also move to the head of the struct.

Looks like I managed to not actually commit the move of the field to the
head of the struct! v3.1 follows....

Ian.

8<------------

>From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Thu, 1 May 2014 19:45:15 +0100
Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more
 efficiently.

The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could
be 256 or even larger. That means there is a potentially huge hole in the
struct before those fields, so move them to the front where they are better
packed.

Moving them to the front also helps ensure that so long as dw_eth_dev is
properly aligned (which it is since "net/designware: ensure device private data
is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids
having to worry too much about compiler specifics.

The {r,t}xbuffs fields also need to be aligned. Previously this was done
implicitly because they immediately followed the descriptor tables. Make this
explicit and also move to the head of the struct.
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>

This is required at least on ARM.

When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>

struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
    ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NAlexey Brodkin <abrodkin@synopsys.com>
Acked-by: NMarek Vasut <marex@denx.de>

Add support for booting from an MMC card.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NHenrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NMarek Vasut <marex@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > +	case 1:
> > +#if CONFIG_MMC1_PG

> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?

It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...

> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.

...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.

> Other than this please add my:
>
> Reviewed-by: Stefan Roese <sr@denx.de>

Thanks!

8<---------------------------------

>From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc support

This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: NLuke Leighton <lkcl@lkcl.net>
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NWills Wang <wills.wang.open@gmail.com>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Cc: Aaron Maoye <leafy.myeh@allwinnertech.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: NTom Rini <trini@ti.com>

Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i)
processors. Enable for the Cubietruck.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@ti.com>

Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NTom Rini <trini@ti.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

This patch adds generic board, start of day and basic build system support for
the Allwinner A20 (sun7i) processor. This code will not been compiled until the
build is hooked up in a later patch. It has been split out to keep the patches
manageable.
Signed-off-by: NAdam Sampson <ats@offog.org>
Signed-off-by: NAleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NLuc Verhaegen <libv@skynet.be>
Signed-off-by: NLuke Leighton <lkcl@lkcl.net>
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NPatrick Wood <patrickhwood@gmail.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NWills Wang <wills.wang.open@gmail.com>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NMarek Vasut <marex@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

This patch adds DRAM initialisation support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NLuke Leighton <lkcl@lkcl.net>
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NMarek Vasut <marex@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMa Haijun <mahaijuns@gmail.com>
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NHenrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Reviewed-by: NTom Rini <trini@ti.com>
Acked-by: NMarek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

This patch adds the basic clocks and timer support for the Allwinner A20
(sun7i) processor. This code will not been compiled until the build is hooked
up in a later patch. It has been split out to keep the patches manageable.

Some of the code here is common to multiple sunxi subarchtectures, hence files
are named sun4i which is the earliest similar variant.
Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NLuke Leighton <lkcl@lkcl.net>
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl>
Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

My Calxeda email is gone, so update my email address.
Signed-off-by: NRob Herring <robh@kernel.org>

Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
Signed-off-by: NStefan Agner <stefan@agner.ch>

Signed-off-by: NDavid Feng <fenghua@phytium.com.cn>

Enable CONFIG_SYS_GENERIC_BOARD on highbank.
Signed-off-by: NRob Herring <robh@kernel.org>

Move addresses for kernel, ramdisk and fdt blob to own variables. Add dtb
blob loading to all existing boot scripts, dtb filenames were taken from
vanilla kernel. Introduce new boot script bootcmd_legacy, which only loads
a kernel and a ramdisk. Make this the default boot script. This should also
restore the behaviour of the original bootloader.

Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NMichael Walle <michael@walle.cc>

Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: NMichael Walle <michael@walle.cc>

Make the common eeprom library available for any I2C driver.
Signed-off-by: NIlya Ledvich <ilya@compulab.co.il>
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>

Add environment partition runtime detection callback.
Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

cm-t54 Eth MAC address is stored in onboard EEPROM.
Add EEPROM support and setup stored Eth MAC address.

If EEPROM does not contain a valid MAC, then generate it from the
processor ID code (reference code is taken from OMAP5 uEvm board file).

Modify Device Tree blob MAC address field with retrieved data.
Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

Add cm-t54 board directory, config file. Enable build.

Basic support includes:

Serial console
SD/MMC
eMMC
USB
Ethernet
Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

As revision code 1 is for silicon revision 2.0, it is easily confused with
silicon revision 1.0.

Device type report also reworked in same style.
Signed-off-by: NSergey Alyoshin <alyoshin.s@gmail.com>

Last section of DMM is used for trapping tiler unmapped sections.
Corresponding trap_size should be deducted from total SDRAM size
only if trap section is overlapping with available SDRAM
based on DMM sections. Fixing the same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Tested-by: NSamuel Egli <samuel.egli@siemens.com>

This adds the Gumstix DuoVero machine [1].  This is a OMAP4430-based
computer-on-module (COM aka SOM) that can be mounted on various
expansion boards with different peripherals.

[1] https://store.gumstix.com/index.php/category/43/Signed-off-by: NAsh Charles <ash@gumstix.com>
[trini: Rename gpmc_enable_gpmc_cs_config to gpmc_enable_gpmc_net_config]
Signed-off-by: NTom Rini <trini@ti.com>

The omap_hw_init_context function (and assorted helpers) is the same for
all OMAP-derived parts as when CHSETTINGS are used, that's the same and
our DDR base is also always the same.  In order to make this common we
simply need to update the names of the define for DDR address space
which is also common.

Cc: Sricharan R. <r.sricharan@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTom Rini <trini@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

Add default eeprom address setting.
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>

Efuse register addresses are wrongly programmed.
Fixing the same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NTom Rini <trini@ti.com>

DRA72 has 1GB connected to EMIF1 only. Updating the details.
And also enable WA for BUG0039 only if corresponding EMIF is present.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NTom Rini <trini@ti.com>

Adding the prcm, dplls, control module hooks for DRA72x.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NTom Rini <trini@ti.com>

TPS65917 is used in DRA722 evm. Update the address offsets accordingly.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Acked-by: NTom Rini <trini@ti.com>

Add silicon ID code for DRA722 silicon.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NTom Rini <trini@ti.com>

GPMC controller on TI's OMAP SoC is general purpose controller to interface
with different types of external devices like;
 - parallel NOR flash
 - parallel NAND flash
 - OneNand flash
 - SDR RAM
 - Ethernet Devices like LAN9220

Though GPMC configurations may be different for each platform depending on
clock-frequency and external device interfacing with controller. But
initialization sequence remains common across all platfoms.

Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c
files into single omap-common/mem-common.c

However, actual platforms specific register config values are still sourced
from corresponding platform specific headers like;
 AM33xx: arch/arm/include/asm/arch-am33xx/mem.h
 OMAP3:  arch/arm/include/asm/arch-omap3/mem.h
 OMAP4:  arch/arm/include/asm/arch-omap4/mem.h
 OMAP4:  arch/arm/include/asm/arch-omap5/mem.h

Also, CONFIG_xx passed by board-profile decide config for which set of macros
need to be used for initialization
 CONFIG_NAND:    initialize GPMC for NAND device
 CONFIG_NOR:     initialize GPMC for NOR device
 CONFIG_ONENAND: initialize GPMC for ONENAND device
Signed-off-by: NPekon Gupta <pekon@ti.com>
[trini: define GPMC_SIZE_256M for omap3]
Signed-off-by: NTom Rini <trini@ti.com>