- 12 7月, 2016 35 次提交
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由 Bin Meng 提交于
The following python error: Traceback (most recent call last): File "./tools/patman/patman", line 144, in <module> series = patchstream.FixPatches(series, args) File "./tools/patman/patchstream.py", line 477, in FixPatches commit = series.commits[count] IndexError: list index out of range is seen when: - 'END' is missing in those tags - those tags are put in the last part in a commit message - the commit is not the last commit of the series Add testing logic to see if a new commit starts. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
'Series-changes' uses blank line to indicate its end. If that is missing, series internal state variable 'in_change' may be wrong. Correct its state. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
If 'END' is missing in a 'Cover-letter' section, and that section happens to show up at the very end of the commit message, and the commit is the last commit of the series, patman fails to generate cover letter for us. Handle this in CloseCommit of patchstream. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
'Cover-letter', 'Series-notes' and 'Commit-notes' tags require an 'END' to be put at the end of its section. If we forget to put an 'END' in those sections, and these sections are followed by another patman tag, patman generates incorrect patches. This adds codes to handle such scenario. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Like other patman tags, use a new variable cover_match to indicate a match for 'Cover-letter'. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Some uclass ids are out of order. Per the comments, sort them in alphabetical order. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The 'COMPAT_' part should appear only once so drop the duplicate part. It is ignored anyway, but let's keep things consistent. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The list is shrinking and we should avoid adding new things. Instead, a proper driver should be created with driver model. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Simon Glass 提交于
We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Xu Ziyuan 提交于
This fixes the following compiler error: common/fb_mmc.c: In function ‘fb_mmc_erase’: common/fb_mmc.c:209:17: error: ‘struct blk_desc’ has no member named ‘block_erase’ Signed-off-by: NZiyuan Xu <xzy.xu@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Hamish Martin 提交于
Define a platform data structure for the MPC85XX GPIO driver to allow use of the driver without device tree. Users should define the GPIO blocks for their platform like this: struct mpc85xx_gpio_plat gpio_blocks[] = { { .addr = 0x130000, .ngpios = 32, }, { .addr = 0x131000, .ngpios = 32, }, }; U_BOOT_DEVICES(my_platform_gpios) = { { "gpio_mpc85xx", &gpio_blocks[0] }, { "gpio_mpc85xx", &gpio_blocks[1] }, }; This is intended to build upon the recent submission of the base MPC85XX driver from Mario Six. We need to use that new driver without dts support and this patch gives us that flexibility. This has been tested on a Freescale T2080 CPU, although only the first GPIO block. Signed-off-by: NHamish Martin <hamish.martin@alliedtelesis.co.nz> Reviewed-by: NMario Six <mario.six@gdsys.cc> Tested-by: NMario Six <mario.six@gdsys.cc> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Update the method of accessing the block device so that it works with CONFIG_BLK enabled. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Update the method of accessing the block device so that it works with CONFIG_BLK enabled. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Now that we have fully moved to driver model, drop the old code. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Update this board to use driver model for block devices and MMC operations. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add support for using driver model for block devices and MMC operations in this driver. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add support for using driver model for block devices and MMC operations in this driver. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move the configuration setting into a separate function which can be used by the driver-model code. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Update the sandbox MMC emulation to use driver model for MMC operations. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
These boards should have maintainer entries. Add them. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Enable this option to move rockchip over to use driver model for MMC operations. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add support to dwmmc for using driver model for MMC operations. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The driver model conversion for MMC has moved in small steps. The first step was to have an MMC device (CONFIG_DM_MMC). The second was to use a child block device (CONFIG_BLK). The final one is to use driver model for MMC operations (CONFIG_DM_MMC_OP). Add support for this. The immediate priority is to make all boards that use DM_MMC also use those other two options. This will allow them to be removed. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This option is not actually needed for rockchip boards. Drop it, since it will not support driver-model MMC operation support. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this code into separate functions so that it can be used from the uclass also. Add static inline versions for when the option is disabled. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Since all Rockchip boards use CONFIG_BLK, we can remove this old code. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rather than having an #ifdef in the main mmc.c file, control this feature from the Makefile by moving the code into its own file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rather than having #ifdef in mmc.c, move this code into the legacy file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rather than having #ifdef in mmc.c, move this code into the uclass file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
These private functions are used both in the driver-model implementation and in the legacy code. Add them to the header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rockchip uses driver model for all subsystems. Specify this in the arm Kconfig rather than as defaults in the Rockchip Kconfig. This means that boards cannot turn these options off, which seems correct. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
These comments were missed when the original code was written. Add them to help people port their drivers over. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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- 11 7月, 2016 3 次提交
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由 Andre Przywara 提交于
Since we lack information about the DRAM initialization for the Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit involved at the moment. Add a README file to explain the process. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NTom Rini <trini@konsulko.com> [trini: Move to board/sunxi/ from doc/] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Stefano Babic 提交于
Because a gpimage cannot be detected, a false GP header is printed instead of checking for further image types. Move gpimage as last to be linked, letting check all other image types and printing a GP header just in case no image is detected. Signed-off-by: NStefano Babic <sbabic@denx.de>
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由 jk.kernel@gmail.com 提交于
It's easier to Cc rockchip maintainers on rockchip-releated patches. Signed-off-by: Njk <jk.kernel@gmail.com>
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- 09 7月, 2016 2 次提交
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由 Mingkai Hu 提交于
For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is set. The SMPEN bit should be set before enabling the data cache. If not enabled, the cache is not coherent with other cores and data corruption could occur. For A57/A72, SMPEN bit enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster. This bit should be set before enabling the caches and MMU, or performing any cache and TLB maintenance operations. Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com> Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Daniel Schwierzeck 提交于
Some archs like MIPS or PPC have a different 'bdinfo' output than ARM regarding the memory configuration. Also support 'memstart = 0x*' in u_boot_utils.find_ram_base() to make all tests requiring the RAM base working on those archs. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: NStephen Warren <swarren@nvidia.com>
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