1. 09 8月, 2017 1 次提交
  2. 29 7月, 2017 1 次提交
  3. 26 7月, 2017 1 次提交
    • S
      Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig · 2be29653
      Simon Glass 提交于
      This converts the following to Kconfig:
         CONFIG_ENV_IS_IN_MMC
         CONFIG_ENV_IS_IN_NAND
         CONFIG_ENV_IS_IN_UBI
         CONFIG_ENV_IS_NOWHERE
      
      In fact this already exists for sunxi as a 'choice' config. However not
      all the choices are available in Kconfig yet so we cannot use that. It
      would lead to more than one option being set.
      
      In addition, one purpose of this series is to allow the environment to be
      stored in more than one place. So the existing choice is converted to a
      normal config allowing each option to be set independently.
      
      There are not many opportunities for Kconfig updates to reduce the size of
      this patch. This was tested with
      
         ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC
      
      And then manual updates.  This is because for CHAIN_OF_TRUST boards they
      can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic
      now.
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      2be29653
  4. 25 7月, 2017 1 次提交
  5. 16 5月, 2017 2 次提交
  6. 15 5月, 2017 2 次提交
  7. 12 10月, 2016 2 次提交
  8. 27 9月, 2016 1 次提交
  9. 10 9月, 2016 1 次提交
  10. 07 9月, 2016 1 次提交
    • T
      TI: Rework SRAM definitions and maximums · fa2f81b0
      Tom Rini 提交于
      On all TI platforms the ROM defines a "downloaded image" area at or near
      the start of SRAM which is followed by a reserved area.  As it is at
      best bad form and at worst possibly harmful in corner cases to write in
      this reserved area, we stop doing that by adding in the define
      NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image
      area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this.
      At current we define the end of scratch space at 0x228 bytes past the
      start of scratch space this this gives us a lot of room to grow.  As
      these scratch uses are non-optional today, all targets are modified to
      respect this boundary.
      
      Tested on OMAP4 Pandaboard, OMAP3 Beagle xM
      
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Nagendra T S <nagendra@mistralsolutions.com>
      Cc: Vaibhav Hiremath <hvaibhav@ti.com>
      Cc: Lokesh Vutla <lokeshvutla@ti.com>
      Cc: Felipe Balbi <balbi@ti.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Nikita Kiryanov <nikita@compulab.co.il>
      Cc: Paul Kocialkowski <contact@paulk.fr>
      Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
      Cc: Adam Ford <aford173@gmail.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
      Cc: Thomas Chou <thomas@wytron.com.tw>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Sam Protsenko <semen.protsenko@linaro.org>
      Cc: Heiko Schocher <hs@denx.de>
      Cc: Samuel Egli <samuel.egli@siemens.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
      Cc: Ben Whitten <ben.whitten@gmail.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Bin Meng <bmeng.cn@gmail.com>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Mugunthan V N <mugunthanvnm@ti.com>
      Cc: "B, Ravi" <ravibabu@ti.com>
      Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Ash Charles <ashcharles@gmail.com>
      Cc: "Kipisz, Steven" <s-kipisz2@ti.com>
      Cc: Daniel Allred <d-allred@ti.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Tested-by: NLokesh Vutla <lokeshvutla@ti.com>
      Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
      Tested-by: NLadislav Michl <ladis@linux-mips.org>
      fa2f81b0
  11. 27 8月, 2016 1 次提交
    • T
      ARM: Move SYS_CACHELINE_SIZE over to Kconfig · 067716ba
      Tom Rini 提交于
      This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
      cases we are mirroring the values used by the Linux Kernel here.  Also,
      so long as (and in this case, it is true) we implement flushes in hunks
      that are no larger than the smallest implementation (and given that we
      mirror the Linux Kernel, again we are fine) it is OK to align higher.
      The biggest changes here are that we always use 64 bytes for CPU_V7 even
      if for example the underlying core is only 32 bytes (this mirrors
      Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
      Linux Kernel) as we do not need multi-platform support (to this degree)
      and only the Cavium ThunderX 88xx series has a use for such large
      alignment.
      
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Prafulla Wadaskar <prafulla@marvell.com>
      Cc: Luka Perkov <luka.perkov@sartura.hr>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nagendra T S <nagendra@mistralsolutions.com>
      Cc: Vaibhav Hiremath <hvaibhav@ti.com>
      Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
      Cc: Steve Rae <steve.rae@raedomain.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Nikita Kiryanov <nikita@compulab.co.il>
      Cc: Stefan Agner <stefan.agner@toradex.com>
      Acked-by: NHeiko Schocher <hs@denx.de>
      Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
      Cc: Peter Griffin <peter.griffin@linaro.org>
      Acked-by: NPaul Kocialkowski <contact@paulk.fr>
      Cc: Anatolij Gustschin <agust@denx.de>
      Acked-by: N"Pali Rohár" <pali.rohar@gmail.com>
      Cc: Adam Ford <aford173@gmail.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Robert Baldyga <r.baldyga@samsung.com>
      Cc: Minkyu Kang <mk7.kang@samsung.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Cc: David Feng <fenghua@phytium.com.cn>
      Cc: Alison Wang <b18965@freescale.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: York Sun <york.sun@nxp.com>
      Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
      Cc: Mingkai Hu <mingkai.hu@nxp.com>
      Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
      Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
      Cc: Saksham Jain <saksham.jain@nxp.com>
      Cc: Qianyu Gong <qianyu.gong@nxp.com>
      Cc: Wang Dongsheng <dongsheng.wang@nxp.com>
      Cc: Alex Porosanu <alexandru.porosanu@freescale.com>
      Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
      Cc: tang yuantian <Yuantian.Tang@freescale.com>
      Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
      Cc: Josh Wu <josh.wu@atmel.com>
      Cc: Bo Shen <voice.shen@atmel.com>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
      Cc: Thomas Chou <thomas@wytron.com.tw>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Sam Protsenko <semen.protsenko@linaro.org>
      Cc: Bin Meng <bmeng.cn@gmail.com>
      Cc: Christophe Ricard <christophe-h.ricard@st.com>
      Cc: Anand Moon <linux.amoon@gmail.com>
      Cc: Beniamino Galvani <b.galvani@gmail.com>
      Cc: Carlo Caione <carlo@endlessm.com>
      Cc: huang lin <hl@rock-chips.com>
      Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
      Cc: Xu Ziyuan <xzy.xu@rock-chips.com>
      Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com>
      Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar>
      Cc: Kever Yang <kever.yang@rock-chips.com>
      Cc: Samuel Egli <samuel.egli@siemens.com>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Hans de Goede <hdegoede@redhat.com>
      Cc: Ian Campbell <ijc@hellion.org.uk>
      Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com>
      Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
      Cc: Andre Przywara <andre.przywara@arm.com>
      Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Ben Whitten <ben.whitten@gmail.com>
      Cc: Tom Warren <twarren@nvidia.com>
      Cc: Alexander Graf <agraf@suse.de>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Vitaly Andrianov <vitalya@ti.com>
      Cc: "Andrew F. Davis" <afd@ti.com>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Carlos Hernandez <ceh@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Ash Charles <ashcharles@gmail.com>
      Cc: Mugunthan V N <mugunthanvnm@ti.com>
      Cc: Daniel Allred <d-allred@ti.com>
      Cc: Gong Qianyu <Qianyu.Gong@freescale.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: NChin Liang See <clsee@altera.com>
      Tested-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NPaul Kocialkowski <contact@paulk.fr>
      067716ba
  12. 28 4月, 2016 1 次提交
    • T
      omap3: Reduce logic/overo SPL max image size · 2489a7e9
      Tom Rini 提交于
      While the OMAP3 has 64KiB of SRAM, per the TRM the download area is only
      from 0x40200000 to 0x4020F000 and exceeding that will cause failure to
      boot.  Further, we need to make sure that we don't run into
      SRAM_SCRATCH_SPACE_ADDR as once SPL is running we will write values
      there and would corrupt our running image.
      
      Cc: Adam Ford <aford173@gmail.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      2489a7e9
  13. 26 4月, 2016 2 次提交
  14. 28 9月, 2015 1 次提交
    • I
      configs: remove remnants of CONFIG_SYS_NAND_QUIET_TEST · e0bed6b6
      Igor Grinberg 提交于
      The config option has been removed by one of the syncs with the Linux
      mainline MTD subsystem:
      ff94bc40 (mtd, ubi, ubifs: resync with Linux-3.14)
      It has been left inside the config files. Currently does not look to
      serve any purpose, so remove it now from all the configs.
      Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
      Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
      Cc: Peter Barada <peter.barada@logicpd.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Peter Tyser <ptyser@xes-inc.com>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Simon Glass <sjg@chromium.org>
      Acked-by: NStefan Roese <sr@denx.de>
      e0bed6b6
  15. 13 8月, 2015 2 次提交
    • N
      kconfig: add config option for shell prompt · 181bd9dc
      Nikita Kiryanov 提交于
      Add option to set shell prompt string from menuconfig and migrate
      boards globally.
      
      The migration is done as follows:
      - Boards that explicitly and unconditionally set CONFIG_SYS_PROMPT had the
        entry moved to their defconfig files.
      - Boards that defined some kind of #ifdef logic which selects the
        CONFIG_SYS_PROMPT (for example qemu-mips) got an #undef CONFIG_SYS_PROMPT
        right before the #ifdef logic and were left alone.
      - This change forces CONFIG_SYS_PROMPT to be a per board decision, and thus
        CONFIG_SYS_PROMPT was removed from all <soc>_common.h and <arch>_common.h
        files. This results in a streamlined default value across platforms, and
        includes the following files: spear-common, sunxi-common, mv-common,
        ti_armv7_common, tegra-common, at91-sama5_common, and zynq-common.
      - Boards that relied on <arch/soc>_common.h values of CONFIG_SYS_PROMPT were
        not updated in their respective defconfig files under the assumption that
        since they did not explicitly define a value, they're fine with whatever
        the default is.
      - On the other hand, boards that relied on a value defined in some
        <boards>_common.h file such as woodburn_common, rpi-common,
        bur_am335x_common, ls2085a_common, siemens_am33x_common, and
        omap3_evm_common, had their values moved to the respective defconfig files.
      - The define V_PROMPT was removed, since it is not used anywhere except for
        assigning a value for CONFIG_SYS_PROMPT.
      
      Cc: Tom Rini <trini@konsulko.com>
      Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
      [trini: Add spring, sniper, smartweb to conversion]
      Signed-off-by: NTom Rini <trini@konsulko.com>
      181bd9dc
    • S
      ti: drop value from CONFIG_SYS_NAND_BUSWIDTH_16BIT · 55f1b39f
      Stefano Babic 提交于
      Signed-off-by: NStefano Babic <sbabic@denx.de>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      55f1b39f
  16. 28 7月, 2015 1 次提交
  17. 26 6月, 2015 1 次提交
  18. 10 5月, 2015 2 次提交
  19. 23 10月, 2014 2 次提交
  20. 10 10月, 2014 1 次提交
  21. 26 7月, 2014 2 次提交
    • P
      ARM: omap: move board specific NAND configs out from ti_armv7_common.h · 434f2cfc
      pekon gupta 提交于
      This patch moves some board specific NAND configs:
      - FROM: generic config file 'ti_armv7_common.h'
      - TO:   individual board config files using these configs.
      So that each board can independently set the value as per its design.
      
      Following configs are affected in this patch:
        CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand>
        CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon>
        CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon>
        CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon>
      
      This patch also updates documentation for few of above NAND configs.
      Signed-off-by: NPekon Gupta <pekon@ti.com>
      434f2cfc
    • P
      ARM: omap: clean redundant PISMO_xx macros used in OMAP3 · 222a3113
      pekon gupta 提交于
      PISMO_xx macros were used to define 'Platform Independent Storage MOdule'
      related GPMC configurations. This patch
      - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided
        by current u-boot infrastructure.
      - Removes unused redundant macros, which are no longer required after
        merging of common platform code in following commit
            commit a0a37183
            ARM: omap: merge GPMC initialization code for all platform
      
      +-----------------+-----------------------------------------------------------+
      | Macro           | Reason for removal                                        |
      +-----------------+-----------------------------------------------------------+
      | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE                        |
      +-----------------+-----------------------------------------------------------+
      | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE                         |
      +-----------------+-----------------------------------------------------------+
      | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE                      |
      +-----------------+-----------------------------------------------------------+
      | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so     |
      |                 | configuring GPMC chip-select for smallest allowable       |
      |                 | segment (GPMC_SIZE_16M) is enough.                        |
      +-----------------+-----------------------------------------------------------+
      | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of    |
      |                 | 128MB (GPMC_SIZE_128M)                                    |
      +-----------------+-----------------------------------------------------------+
      +-----------------+-----------------------------------------------------------+
      | PISMO1_NOR      |  Unused Macros                                            |
      | PISMO1_NAND     |                                                           |
      | PISMO2_CS0      |                                                           |
      | PISMO2_CS1      |                                                           |
      | PISMO1_ONENAND  |                                                           |
      | PISMO2_NAND_CS0 |                                                           |
      | PISMO2_NAND_CS1 |                                                           |
      | PISMO1_NOR_BASE |                                                           |
      | PISMO1_NAND_BASE|                                                           |
      | PISMO2_CS0_BASE |                                                           |
      +-----------------+-----------------------------------------------------------+
      Signed-off-by: NPekon Gupta <pekon@ti.com>
      222a3113
  22. 20 6月, 2014 1 次提交
    • A
      omap3: overo: Select fdtfile for expansion board · 12cc5437
      Ash Charles 提交于
      The u-boot Overo board actually supports both Overo (OMAP35xx)
      and Overo Storm (AM/DM37xx) COMs with a range of different expansion
      boards.  This provides a mechanism to select the an appropriate device
      tree file based on the processor version and, if available, the
      expansion board ID written on the expansion board EEPROM. To match the
      3.15+ kernels, fdtfile names have this format:
       "omap3-overo[-storm]-<expansion board name>.dtb"
      
      By default, we use "omap3-overo-storm-tobi.dtb".
      Signed-off-by: NAsh Charles <ashcharles@gmail.com>
      
      Conflicts:
      	include/configs/omap3_overo.h
      12cc5437
  23. 07 6月, 2014 1 次提交
    • P
      mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width · b80a6603
      pekon gupta 提交于
      GPMC controller needs to be configured based on bus-width of the NAND device
      connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
      parameters is not possible in following situations:
      SPL:    SPL NAND drivers does not support ONFI parameter reading.
      U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
              which is called before probing for devices, hence any ONFI parameter
              information is not available during GPMC initialization.
      
      Thus, OMAP NAND driver expected board developers to explicitely write GPMC
      configurations specific to NAND device attached on board in board files itself.
      But this was troublesome for board manufacturers as they need to dive into
      lengthy platform & SoC documents to find details of GPMC registers and
      appropriate configurations to get NAND device working.
      
      This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
      hich indicates that connected NAND device has x16 bus-width. And then based on
      this config GPMC driver itself initializes itself based on NAND bus-width. This
      keeps board developers free from knowing GPMC controller specific internals.
      Signed-off-by: NPekon Gupta <pekon@ti.com>
      b80a6603
  24. 24 5月, 2014 7 次提交
  25. 05 3月, 2014 1 次提交
    • P
      mtd: nand: omap: remove unused #defines from common omap_gpmc.h · a7e36fc9
      pekon gupta 提交于
      OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
      params or nand_id[] table. And based on that it defines ECC layout.
      This patch
      1) removes following board configs used for defining NAND ECC layout
      	- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
      	- GPMC_NAND_ECC_LP_x8_LAYOUT  (for large page x8 NAND)
      	- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
      	- GPMC_NAND_ECC_SP_x8_LAYOUT  (for small page x8 NAND)
      
      2) removes unused #defines in common omap_gpmc.h depending on above configs
      
      Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
      Signed-off-by: NPekon Gupta <pekon@ti.com>
      a7e36fc9
  26. 22 11月, 2013 1 次提交
    • P
      mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme · 3f719069
      pekon gupta 提交于
      This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
      CONFIG_xx used for selecting NAND ecc-schemes.
      This patch aims at solving following issues.
      
      1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
         other ecc-schemes also supported in hardware. like;
       - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
         the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
         software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
       - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
         supports BCH16 ecc-scheme also.
      
      2) Different platforms use different CONFIG_xx to select ecc-schemes, which
         adds confusion for user while migrating platforms.
       - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
          8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
          whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
          and BCH16 (in future).
       - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
          correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
       - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library
      
      Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
      on SoC platform and NAND driver. And user can select ecc-scheme independently
      foreach board.
      However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
      depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)
      Signed-off-by: NPekon Gupta <pekon@ti.com>
      3f719069